Abstract: A system and method of verifying data at a microcontroller using message authentication codes (MACs) includes generating at a microprocessor of the microcontroller a valid MAC using valid data; transmitting the valid MAC to a peripheral of the microcontroller along with the valid data; receiving an authentication message at the microprocessor from the peripheral in response to transmitting the valid MAC; generating at the microprocessor an invalid MAC, which is created by changing one or more bits of the valid MAC; transmitting the invalid MAC to the peripheral along with the valid data in response to the authentication message; and receiving a second authentication message at the microprocessor from the peripheral in response to transmitting the invalid MAC.

Abstract: A method of securing electronic control units (ECUs) using message authentication codes includes receiving a message authentication code (MAC) at an ECU; determining that the length of the MAC is greater than or equal to a predefined bit value; authenticating the MAC when the length of the MAC has been determined to be equal to or greater than the predefined bit value; and rejecting the MAC when the length of the MAC has been determined to be less than the predefined bit value.

Abstract: A system and method of verifying data at a microcontroller using message authentication codes (MACs) includes generating at a microprocessor of the microcontroller a valid MAC using valid data; transmitting the valid MAC to a peripheral of the microcontroller along with the valid data; receiving an authentication message at the microprocessor from the peripheral in response to transmitting the valid MAC; generating at the microprocessor an invalid MAC, which is created by changing one or more bits of the valid MAC; transmitting the invalid MAC to the peripheral along with the valid data in response to the authentication message; and receiving a second authentication message at the microprocessor from the peripheral in response to transmitting the invalid MAC.

Abstract: A method of securing electronic control units (ECUs) using message authentication codes includes receiving a message authentication code (MAC) at an ECU; determining that the length of the MAC is greater than or equal to a predefined bit value; authenticating the MAC when the length of the MAC has been determined to be equal to or greater than the predefined bit value; and rejecting the MAC when the length of the MAC has been determined to be less than the predefined bit value.

Abstract: Time-interleaved signal converter systems are provided that multiplex respective digital sequences of system converters into an interleaved digital sequence before filtering each respective digital sequence with digital filters that apply respective filter coefficients to thereby reduce system degradation caused by converter timing skews. Use of the interleaved digital sequence in the filtering process substantially increases the system bandwidth from approximately one half of the converter sample rate RC to approximately one half of a greater system sample rate RS. Converter system embodiments are preferably configured to reduce large timing skews prior to filtering the interleaved digital sequence to obtain further reduction. This combined approach has been found to enhance interleaved system performance.

Abstract: Comparator systems are provided that include cross-coupled transistors which respond to a differential network that receives an input signal. The systems further include a control transistor connected across the cross-coupled transistors and a bias network configured to apply a bias voltage to the control transistor that is substantially the voltage across two transistors which are each biased into saturation. It has been found that this bias during the systems' acquire phase substantially stabilizes the systems' gain over variations in their total environment and that this stabilization enhances the systems' performance.

Abstract: The present invention relates to a method and system for reducing integral non linearity errors in a pipeline Analog to Digital Converter (ADC). The invention provides in a first embodiment a method comprising the steps of: adding an analog dither signal to the analog input signal of a pipeline Analog to Digital Converter, and converting the analog input signal to a digital output signal by means of the pipeline Analog to Digital Converter. The amplitude of the analog dither signal is determined by the architecture of the Analog to Digital Converter. The invention also provides in a second embodiment a circuit comprising a pipeline analog to digital converter for converting an analog input signal to a digital output signal and a feedback circuit coupled to the converter such that the digital output signal is adapted to have an average non linearity error value of about zero LSBs.

Abstract: A circuit with a common-mode dual output includes a feedback circuit connected to alternate the states of the dual output between an average output level and a desired common-mode level. The difference between the average and desired levels is proportional to a signal offset level. An impedance matching circuit is connected to the feedback circuit to adjust the signal offset level.