Patents by Inventor David Ney

David Ney has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuit reliability
    Patent number: 8307319
    Abstract: A method of manufacturing an integrated circuit having minimized electromigration effect, wherein the integrated circuit comprises one or more interconnect, said the or each interconnect comprising a dielectric layer having an intrinsic parameter at a first defined value, characterized in that said method comprises: identifying one or more characteristics of the or each interconnect; determining a minimal process distance from the or each interconnect for the application of one or more first metal elements; calculating a required correction parameter which can correct the intrinsic parameter at said first defined value; calculating a required number of the first metal elements which have the intrinsic parameter at a second defined value, such that the second defined value provides the required correction parameter for the first defined value; applying a plurality of said first metal elements around the interconnect at said minimum process distance to overcome the problem of electromigration caused by the intr
    Type: Grant
    Filed: May 15, 2007
    Date of Patent: November 6, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Hisao Kawasaki, David Ney
  • IMPROVEMENTS IN OR RELATING TO INTEGRATED CIRCUIT RELIABILITY
    Publication number: 20100301487
    Abstract: A method of manufacturing an integrated circuit having minimized electromigration effect, wherein the integrated circuit comprises one or more interconnect, said the or each interconnect comprising a dielectric layer having an intrinsic parameter at a first defined value, characterized in that said method comprises: identifying one or more characteristics of the or each interconnect; determining a minimal process distance from the or each interconnect for the application of one or more first metal elements; calculating a required correction parameter which can correct the intrinsic parameter at said first defined value; calculating a required number of the first metal elements which have the intrinsic parameter at a second defined value, such that the second defined value provides the required correction parameter for the first defined value; applying a plurality of said first metal elements around the interconnect at said minimum process distance to overcome the problem of electromigration caused by the intr
    Type: Application
    Filed: May 15, 2007
    Publication date: December 2, 2010
    Inventors: Hisao Kawasaki, David Ney