Patents by Inventor David NOVERRAZ

David NOVERRAZ has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System and method for generating secure partition regions in open and secure processor environments
    Patent number: 11880718
    Abstract: Example implementations includes a method of partitioning a non-transitory memory device by detecting a boot state of a processing device including a non-transitory memory device, identifying a startup state of the processing device based on the boot state, and partitioning the memory device into at least one secure address region, in accordance with a determination that the startup state satisfies an operating state condition. Example implementations also include a method of generating a secure partition associated with a non-transitory memory device by identifying a target processing instruction restricted to execution at a secure subsystem of a processing device, assigning to the target processing instruction a secure address, associating the secure address with a secure address region of a non-transitory memory device of the processing device, and generating a secure partition table including the secure address.
    Type: Grant
    Filed: September 15, 2020
    Date of Patent: January 23, 2024
    Assignee: Renesas Electronics Corporation
    Inventors: David Noverraz, Paul Bell, Kennedy Ho
  • SYSTEM AND METHOD FOR GENERATING SECURE PARTITION REGIONS IN OPEN AND SECURE PROCESSOR ENVIRONMENTS
    Publication number: 20220083394
    Abstract: Example implementations includes a method of partitioning a non-transitory memory device by detecting a boot state of a processing device including a non-transitory memory device, identifying a startup state of the processing device based on the boot state, and partitioning the memory device into at least one secure address region, in accordance with a determination that the startup state satisfies an operating state condition. Example implementations also include a method of generating a secure partition associated with a non-transitory memory device by identifying a target processing instruction restricted to execution at a secure subsystem of a processing device, assigning to the target processing instruction a secure address, associating the secure address with a secure address region of a non-transitory memory device of the processing device, and generating a secure partition table including the secure address.
    Type: Application
    Filed: September 15, 2020
    Publication date: March 17, 2022
    Applicant: Renesas Electronics Corporation
    Inventor: David NOVERRAZ