Abstract: Method, apparatus and article of manufacture for ensuring the uniqueness and non-alterability of vital product data (VPD) of computerized apparatus. To protect the vital product data from undesired alterations, the data is stored in a secure, write-protected location. A copy (or copies) of the VPD may also be stored elsewhere to facilitate recovery in the event the primary copy is lost, corrupted or invalid.

Abstract: Method, apparatus and article of manufacture for on-demand access to computerized resources. A resource-time value includes a resource-identifying component and a usage limit component. The resource-identifying component specifies a given type of a resource and the usage limit component defines a maximum allowable usage value of the resource on the basis of time and quantity. Upon verifying the resource-time value, a quantity of the resource is enabled. The enabled resources may then be placed into service for specified time periods, wherein the quantity of resources placed into service and the time periods are delimited by the usage limit component.

Abstract: A flexible format for heterogeneous data records includes a fixed-length header containing a header ECC, a table of contents descriptor, and a table of contents ECC descriptor; a variable-length table of contents containing multiple entries, each entry containing a record descriptor and a corresponding record ECC descriptor; multiple variable-length records corresponding to the multiple entries in the table of contents; and optional ECCs corresponding to the ECC descriptors. Preferably, the format is used for vital component data in non-volatile memory of a computer system field replaceable unit, and is read by the system to identify the unit and configure the system.

Abstract: The present invention provides an improved method, an system, and a set of computer implemented instructions for handling a cache containing multiple single-bit hard errors on multiple addresses within a data processing system. Such handles will prevent any down time by logging in the parts to be replaced by an operator when certain level of bit errors is reached. When a hard error exists on a cache address for the first time, serviceable first hard error, that cache line is deleted. Thus the damaged memory device is no longer used by the system. As a result, the system is running with “N−x” lines wherein “N” constitutes the total number of existing lines and “x” is less than “N”. An alternative method is to exchange the damaged memory device to a spare memory device. In order to provide such services, the system must first differentiate whether an error is a soft or hard error.

Abstract: An apparatus and method of repairing a processor array for a failure detected at runtime in a system supporting persistent component deallocation are provided. The apparatus and method of the present invention allow redundant array bits to be used for recoverable faults detected in arrays during run time, instead of only at system boot, while still maintaining the dynamic and persistent processor deallocation features of the computing system. With the apparatus and method of the present invention, a failure of a cache array is detected and a determination is made as to whether a repairable failure threshold is exceeded during runtime. If this threshold is exceeded, a determination is made as to whether cache array redundancy may be applied to correct the failure, i.e. a bit error. If so, the cache array redundancy is applied without marking the processor as unavailable.

Abstract: A smart chip protection system contains a unique public/private identity key pair and uses a separate public/private signature key pair. The identity private key is stored in permanent, secure storage such that it can not be read outside the chip. An issuing entity generates a descriptor containing the identity public key, attribute data, and a digital signature. The digital signature is generated by enciphering a derivation of the identity public key and the attribute data with the signature private key known only to the issuer. The authenticity of the descriptor data is verified by decrypting the signature with the signature public key using a known algorithm, and comparing the result to the derivation of the descriptor data. The identity of the object can be verified requesting the smart chip ro perform an encryption/decryption operation using its identity private key, and performing the complement using the public key.

Abstract: Disclosed is a system, method, and program for determining the configuration of a computer system having a planar board, a planar bus, and attached planar devices. A read operation is performed on planar configuration memory indicating addresses for each planar device capable of being attached to the planar board. A read command is then sent to the address of each planar device indicated in the planar configuration memory to determine if each planar device is available. A configuration memory for each available planar device is read to determine configuration information and if there are addresses of attached devices accessible through the planar device. A read command is then sent to the address of each attached device indicated in the configuration memory of the planar device to determine configuration information for each attached device and if there are further attached devices accessible through the attached device.

Abstract: A material and a method for forming a tamper-indicating identification coating are provided. The components of the coating are selected such that the coating exhibits a characteristic absorption spectrum with distinct features in individual regions during Fourier-transform infa-red (FTIR) spectroscopy. The coating components are selected to provide a distinct spectrum while, at the same time, providing a sufficiently complex spectrum such that the coating is difficult to duplicate. Also, a blowing agent in the coating decomposes to change the FTIR spectrum due to the heat associated with resoldering of an out-of-warranty electronic part marked with the identification coating to an in-warranty circuit card. In addition, the coating may contain a fluorophore to reveal the presence of a tamper-indicating identification coating, allowing a manufacturer to check the card by exposure with ultra-violet (UV) light. Further, the coating composition may be changed periodically and tracked to provide a date marker.

Abstract: A material and a method for forming a tamper-indicating identification coating are provided. The components of the coating are selected such that the coating exhibits a characteristic absorption spectrum with distinct features in individual regions during Fourier-transform infra-red (FTIR) spectroscopy. The coating components are selected to provide a distinct spectrum while, at the same time, providing a sufficiently complex spectrum such that the coating is difficult to duplicate. Also, a blowing agent in the coating decomposes to change the FTIR spectrum due to the heat associated with resoldering of an out-of-warranty electronic part marked with the identification coating to an in-warranty circuit card. In addition, the coating may contain a fluorophore to reveal the presence of a tamper-indicating identification coating, allowing a manufacturer to check the card by exposure with ultra-violet (UV) light. Further, the coating composition may be changed periodically and tracked to provide a date marker.

Abstract: A nonvolatile memory is provided with a counterfeit detection mechanism by storing an encryption key and performing cryptographic operations on chip. The encryption key, which is stored in the nonvolatile memory in a protected manner such that it is never exported, is based on unique data within the nonvolatile memory. Unless an expected encryption key calculated from the unique data matches the stored encryption key, the system will not allow the resource containing the nonvolatile memory to be utilized. Equivalence of the expected and stored encryption keys is tested by enciphering and deciphering a random number. The data in the nonvolatile memory may be copied but not altered since each data block includes an electronic signature. Modification of the data in the nonvolatile memory as part of an effort to counterfeit the stored encryption key is therefore useless.

Abstract: A method and apparatus for controlling the movement of owned computer parts to prevent theft of the computer parts for use in a different computer system. A code is defined to identify an owner of a system or group of systems, and this code is programmed into non-volatile memory located on the systems and parts belonging to that owner. The system software automatically does a comparison of all parts in the system to ensure that the code on each part is compatible with that on the system. A given computer part will not function if it is installed into a system which does not have a code compatible with that of the part. This invention makes stolen parts useless, and knowledge of the existence of this invention is a theft deterrent. The owner can choose to change this code periodically by entering the value of the previous code.

Abstract: A method and apparatus for providing system operation validation is disclosed. The method and apparatus for validation operates within a computer system comprising a central processing unit coupled to a programmable memory, and to a system device. The programmable memory may store programs and instructions executable on the CPU and a non-volatile memory is also provided for access by the CPU. The system operation validation is provided by a chip identifier located within a device memory within the system device, which memory also serves as a chip identifier register. Selected information stored within the non-volatile memory is used, along with the chip identifier, to generate a first encryption code associated with the system device. An encryption key is used to generate a second encryption code associated with the computer system. The first and second encryption codes are matched to provide a first level system operation validation.