Abstract: A method of fabricating a multilayer circuit board is provided which includes forming a layer of a the multilayer circuit board with an internal clearance region having a modified voltage-to-ground clearance of conductive material adjacent to an aperture of the multilayer circuit board. The modified voltage-to-ground clearance of conductive material is based on a configuration of a connector pin to be press-fit connected within the aperture of the multilayer circuit board, and the internal clearance region is enlarged in a direction of greatest normal force outward from the aperture with insertion of the connector pin into the aperture.

Abstract: A method for forming an electronic device that includes solder bonding pins from a component to plated through holes of a board, the component being positioned on a first side of the board; and applying solder paste to openings of the plated through holes on a second side of the board opposite the first side of the board that the component is positioned on. The method can further include drawing the solder paste to the pins to provide a reworked solder bond bonding at least one of the pins to the plated through hole.

Abstract: Packet-Based Direct Memory Access. The present invention overcomes the oftentimes hardware consumptive and complex implementation of conventional direct memory access (DMA) that employs descriptors. The descriptors that must are employed by conventional DMA must be set up by software, and the handshaking between the hardware and software is typically very cumbersome. The packet-based DMA performed in accordance with the present invention is operable and adaptable to various types of cell-based DMA modes. A flow control regulator, or flow control state machine, is used to control the packet-based DMA performed in accordance with the present invention. Two different multiplexors (MUXs) are employed, one for each of the transmit and the receive packet-based DMA transfers, to select the various cases of packet-based DMA. The present invention is operable within various modes including asynchronous transfer mode (ATM) cell-based asynchronous digital subscriber loop (ADSL) applications.

Abstract: In one embodiment, a single designated register in a codec is utilized by a controller to address and control a large number of expansion registers belonging to various expansion devices. The controller can write to or read from the designated register through an AC-link while complying with the AC '97 specification. The address and data bits in the designated register are used to write to or read from a target register in an expansion device. The designated register is selected from one of the 16 registers available to a design engineer in accordance with the AC '97 specification. An example of an expansion device that can be addressed and controlled through the designated register is an SSD device. In another embodiment, two designated registers in the codec register set are utilized. The controller can write address information into one of the designated registers while complying with the AC '97 specification.

Abstract: A system and method for providing soft modem and soft audio copy protection for hardware interfaces and software code utilized in an AC '97 architecture to prevent against unauthorized copying. The system confirms that a codec connected to the AC '97 architecture is provided by a desired supplier. The system performs a sample rate negotiation to determine an operating sample rate for data transfer. When the system provides a desired sample rate which does not correspond to a sample rate appearing in a predefined set of sample rates supported by an AC '97 architecture, the system expects the codec to echo back a predesignated sample rate during the sample rate negotiation indicating that a desired sample rate has been received which does not correspond to one of the supported sample rates.

Abstract: A system and method for performing a digital subscriber line (DSL) transmission over an AC-link bus directly connecting a modem codec to a codec controller. The codec and codec controller connected to the AC-link bus are configured for a particular industry-defined AC-link bus protocol defining a data packet having multiple time-division multiplexed (TDM) data slots, where the present invention redefines the protocol of the AC-link bus in order to allow a high bandwidth DSL transmission to be performed using the data packets transmitted over the AC-link bus. The present invention redefines the AC-link bus protocol to provide at least one additional TDM data slot in the data packet for handling DSL modem transmission data streams. The reconfigured data packet provides additional bandwidth capabilities which allow high-bandwidth DSL modem transmissions to be sent in the data packets transmitted over the AC-link bus, which where not previously achievable using the industry-defined AC-link protocol.

Abstract: A method and apparatus for facilitating AC-link communications between a controller and a slow peripheral of a codec is disclosed. In one embodiment, the GPIO_INT bit (i.e. bit 0 in slot 12 in the AC-link's SDATA_IN line) is utilized as an interrupt flag to indicate when data requested by the controller from the slow peripheral is returned and is available to be read by the controller. The GPIO_INT bit can also be used to indicate when a write into the slow peripheral is completed. In this embodiment, a “peripheral ready bit” or a “peripheral ready signal” originated from the slow peripheral is used to set the GPIO_INT bit. Another embodiment is directed to controllers which ignore the GPIO_INT bit as a source of interrupt. To accommodate these controllers, one of the GPIO bits is used to send the value of the “peripheral ready bit” to the controller.

Abstract: A system and method for performing signal acceleration on data packets communicated across an AC-link bus directly interconnecting a codec to a codec controller. The system positions an accelerator directly in the communication path between the codec and its respective codec controller, so that the accelerator is arranged to receive signals traveling through the AC-link bus. This arrangement allows data manipulation to be performed by the accelerator on the data packets communicated across the AC-link bus, where the processed data packets are output by the accelerator back onto the AC-link bus. The accelerator is arranged to have real-time access to the input and output data streams traveling through the AC-link bus, so that data manipulation can be performed without multiple communications to the codec controller or host computer CPU.

Abstract: A functionality selection system that selects the operation of a function within a semiconductor device. The semiconductor device is capable of performing a plurality of functions. The functions are already embedded in the semiconductor device and available for selection. The functionality selection system operates prior to encapsulation of the semiconductor device. The availability of performing the functionality selection just prior to encapsulation provides numerous advantages over conventional functionality selection systems. By performing the selection of the semiconductor device's functionality to just prior to encapsulation, the lag time between a customer's order and a shipment of the semiconductor device is shortened. The lag time can be shortened to only two weeks in contrast to many conventional selection systems that have lag times as long as three months. The invention is also a functionality identification system.

Abstract: A system and method for providing soft modem and soft audio copy protection for hardware interfaces and software code utilized in an AC '97 architecture to prevent against unauthorized copying. The system confirms that a codec connected to the AC '97 architecture is provided by a desired supplier. The system performs a sample rate negotiation to determine an operating sample rate for data transfer. When the system provides a desired sample rate which does not correspond to a sample rate appearing in a predefined set of sample rates supported by an AC '97 architecture, the system expects the codec to echo back a predesignated sample rate during the sample rate negotiation indicating that a desired sample rate has been received which does not correspond to one of the supported sample rates. When the system determines that the predesignated sample rate has been echoed back, the copy protection system recognizes the codec as being provided by an authorized supplier and authorizes the codec for operation.

Abstract: A system and method for providing soft modem and soft audio copy protection for hardware interfaces and software code utilized in an AC '97 architecture to prevent against unauthorized copying. The system confirms that a codec connected to the AC '97 architecture is provided by a desired supplier. The system performs a sample rate negotiation to determine an operating sample rate for data transfer. When the system provides a desired sample rate which does not correspond to a sample rate appearing in a predefined set of sample rates supported by an AC '97 architecture, the system expects the codec to echo back a predesignated sample rate during the sample rate negotiation indicating that a desired sample rate has been received which does not correspond to one of the supported sample rates.