Abstract: A semiconductor package is described for supporting and interconnecting semiconductor chips, each chip having contact lands on a contact surface, the package also including a substrate with a contact surface. An interposer module is disposed between at least one chip's contact surface and the substrate's contact surface. The interposer module has first and second opposed surfaces and a first plurality of contact locations positioned on its first surface which mate with a chip's contact land. A second plurality of contact locations on the interposer modules second surface are positioned to mate with contact lands on the substrate. A set of conductive vias are positioned within the interposer module and connect the first plurality of contact locations with a first subset of the second plurality of contact locations. A distributed capacitance layer is positioned within the interposer and is adjacent to its first surface.

Abstract: An integrated circuit carrier comprising a modular substrate having an upper surface, a multitude of electrically conducting device terminals on the upper surface of the substrate, a multitude of electrically conducting engineering change pads also on the upper surface of the substrate, and an engineering change network to form a unique electrical connection between each of an arbitrary subset of the device terminals and each of an arbitrary subset of the engineering change pads. The engineering change network includes a multitude of connecting pads, and a multitude of first, second, and third conductive leads or wires, and each of the connecting pads includes first and second spaced apart sections.

Abstract: Waveform generating apparatus for synthesizing a non-linear waveform by sampling voltage levels along a series string of resistances. The series string of resistances is a linear resistance fabricated in a monolithic integrated circuit structure and includes a series of contiguous resistance elements of approximately the same physical configuration and of approximately equal resistance value. Each resistance element has a projection or nub. Particular ones of the nubs serve as source regions for MOS switching transistors at the sampling point. The intervening nubs are unconnected. The symmetry of the structure compensates for errors otherwise introduced by the presence of source region nubs at sampling points spaced in a non-linear relationship.