Patents by Inventor David P. Mancini
David P. Mancini has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240097634Abstract: A method of manufacturing a travelling wave parametric amplifier (TWPA) includes forming a superconducting junction on a substrate. Trenches are etched away through a metal surface and into a layer of dielectric material. The trenches define a plurality of fingers positioned in an interdigitated arrangement of capacitors defined by a metal and a dielectric material that remains from the etched away metal surface and the layer of dielectric material.Type: ApplicationFiled: September 15, 2022Publication date: March 21, 2024Inventors: Michael Karunendra Selvanayagam, Corrado P. Mancini, David Lokken-Toyli, Gerald W. Gibson, Kathryn Turner Schonenberg, Shayne Cairns
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Patent number: 8198705Abstract: In accordance with a specific embodiment, a method of processing a semiconductor substrate is disclosed whereby the substrate is thinned, and the dice formed on the substrate are singulated by a common process. Trench regions are formed on a backside of the substrate. An isotropic etch of the backside results in a thinning of the substrate while maintaining the depth of the trenches, thereby facilitating singulation of the die.Type: GrantFiled: September 16, 2008Date of Patent: June 12, 2012Assignee: Freescale Semiconductor, Inc.Inventors: David P. Mancini, Young Sir Chung, William J. Dauksher, Donald F. Weston, Steven R. Young, Robert W. Baird
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Patent number: 7507638Abstract: In accordance with a specific embodiment, a method of processing a semiconductor substrate is disclosed whereby the substrate is thinned, and the dice formed on the substrate are singulated by a common process. Trench regions are formed on a backside of the substrate. An isotropic etch of the backside results in a thinning of the substrate while maintaining the depth of the trenches, thereby facilitating singulation of the die.Type: GrantFiled: June 30, 2004Date of Patent: March 24, 2009Assignee: Freescale Semiconductor, Inc.Inventors: David P. Mancini, Young Sir Chung, William J. Dauksher, Donald F. Weston, Steven R. Young, Robert W. Baird
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Publication number: 20090008748Abstract: In accordance with a specific embodiment, a method of processing a semiconductor substrate is disclosed whereby the substrate is thinned, and the dice formed on the substrate are singulated by a common process. Trench regions are formed on a backside of the substrate. An isotropic etch of the backside results in a thinning of the substrate while maintaining the depth of the trenches, thereby facilitating singulation of the die.Type: ApplicationFiled: September 16, 2008Publication date: January 8, 2009Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: David P. Mancini, Young Sir Chung, William J. Dauksher, Donald F. Watson, Steven R. Young, Robert W. Baird
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Patent number: 7063919Abstract: This invention relates to semiconductor devices, microelectronic devices, micro electro mechanical devices, microfluidic devices, and more particularly to an improved lithographic template including a repaired defect, a method of fabricating the improved lithographic template, a method for repairing defects present in the template, and a method for making semiconductor devices with the improved lithographic template. The lithographic template (10) is formed having a relief structure (26) and a repaired gap defect (36) within the relief structure (26). The template (10) is used in the fabrication of a semiconductor device (40) for affecting a pattern in device (40) by positioning the template (10) in close proximity to semiconductor device (40) having a radiation sensitive material formed thereon and applying a pressure to cause the radiation sensitive material to flow into the relief structure present on the template.Type: GrantFiled: July 31, 2002Date of Patent: June 20, 2006Inventors: David P. Mancini, William J. Dauksher, Kevin J. Nordquist, Douglas J. Resnick
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Patent number: 6992371Abstract: A novel device, such as a semiconductor device, a microfluidic device, a surface acoustic wave device an imprint template, or the like, including an amorphous carbon layer for improved adhesion of organic layers and method of fabrication. The device includes a substrate having a surface, an amorphous carbon layer, formed overlying the surface of the substrate, and a low surface energy material layer overlying the surface of the substrate. The device is formed by providing a substrate having a surface, depositing a low surface energy material layer and an amorphous carbon layer overlying the surface of the substrate adjacent the low surface energy material layer using plasma enhanced chemical vapor deposition (PECVD) or sputtering.Type: GrantFiled: July 16, 2004Date of Patent: January 31, 2006Assignee: Freescale Semiconductor, Inc.Inventors: David P. Mancini, Jaime A. Quintero, Doug J. Resnick, Steven M. Smith
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Patent number: 6890688Abstract: This invention relates to a lithographic template, a method of forming the lithographic template and a method for forming devices with the lithographic template. The lithographic template (10, 110, 210) is formed having a substrate (12, 112, 212) and a charge dissipation layer (20, 120, 220), and a patterned imageable relief layer, (16, 116, 216) formed on a surface (14, 114, 214) of the substrate (10, 110, 210) using radiation. The template (10, 110, 210) is used in the fabrication of a semiconductor device (344) for affecting a pattern in the device (344) by positioning (338) the template (10, 11, 210) in close proximity to semiconductor device (344) having a radiation sensitive material (334) formed thereon and applying a pressure (340) to cause the radiation sensitive material to flow into the relief image present on the template (10, 110, 210).Type: GrantFiled: December 18, 2001Date of Patent: May 10, 2005Assignees: Freescale Semiconductor, Inc., University of Texas SystemInventors: David P. Mancini, Douglas J. Resnick, Carlton Grant Willson
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Patent number: 6852454Abstract: This invention relates to semiconductor devices, microelectronic devices, microelectromechanical devices, microfluidic devices, photonic devices, and more particularly to a multi-tiered lithographic template, a method of forming the multi-tiered lithographic template and a method for forming devices with the multi-tiered lithographic template. The multi-tiered lithographic template (10/10?) is formed having a first relief structure and a second relief structure, thereby defining a multi-tiered relief image. The template is used in the fabrication of a semiconductor device (40) for affecting a pattern in device (40) by positioning the template in close proximity to semiconductor device (40) having a radiation sensitive material formed thereon and applying a pressure to cause the radiation sensitive material to flow into the multi-tiered relief image present on the template.Type: GrantFiled: June 18, 2002Date of Patent: February 8, 2005Assignee: Freescale Semiconductor, Inc.Inventors: David P. Mancini, Douglas J. Resnick
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Patent number: 6737202Abstract: An improved and novel method of forming a tiered structure, such as a T-gate structure, including the fabrication of a stabilized resist layer that provides for the prevention of interlayer intermixing with the deposition of subsequent resist layers. The method includes patterning a base resist layer to provide for an opening which will form the stem of the tiered structure and subsequently stabilizing the resist base layer without deforming the stem opening. Next, a resist stack is deposited on an uppermost surface of the stabilized resist layer. Patterning the resist stack provides for an opening on an uppermost layer or portion, and a reentrant profile in a portion of the resist stack adjacent the stabilized resist layer. Metallization and subsequent removal of the resist layers results in a tiered structure, such as a T-gate structure, formed using only low to medium molecular weight, linear polymeric materials such as those used in positive optical resists in optical lithography.Type: GrantFiled: February 22, 2002Date of Patent: May 18, 2004Assignee: Motorola, Inc.Inventors: Kathleen Ann Gehoski, Laura Popovich, David P. Mancini, Doug J. Resnick
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Publication number: 20040023126Abstract: This invention relates to semiconductor devices, microelectronic devices, micro electro mechanical devices, microfluidic devices, and more particularly to an improved lithographic template including a repaired defect, a method of fabricating the improved lithographic template, a method for repairing defects present in the template, and a method for making semiconductor devices with the improved lithographic template. The lithographic template (10) is formed having a relief structure (26) and a repaired gap defect (36) within the relief structure (26). The template (10) is used in the fabrication of a semiconductor device (40) for affecting a pattern in device (40) by positioning the template (10) in close proximity to semiconductor device (40) having a radiation sensitive material formed thereon and applying a pressure to cause the radiation sensitive material to flow into the relief structure present on the template.Type: ApplicationFiled: July 31, 2002Publication date: February 5, 2004Inventors: David P. Mancini, William J. Dauksher, Kevin J. Nordquist, Douglas J. Resnick
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Publication number: 20030232252Abstract: This invention relates to semiconductor devices, microelectronic devices, microelectromechanical devices, microfluidic devices, photonic devices, and more particularly to a multi-tiered lithographic template, a method of forming the multi-tiered lithographic template and a method for forming devices with the multi-tiered lithographic template. The multi-tiered lithographic template (10/10′) is formed having a first relief structure and a second relief structure, thereby defining a multi-tiered relief image. The template is used in the fabrication of a semiconductor device (40) for affecting a pattern in device (40) by positioning the template in close proximity to semiconductor device (40) having a radiation sensitive material formed thereon and applying a pressure to cause the radiation sensitive material to flow into the multi-tiered relief image present on the template.Type: ApplicationFiled: June 18, 2002Publication date: December 18, 2003Inventors: David P. Mancini, Douglas J. Resnick
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Patent number: 6630746Abstract: An alignment mark (51) is formed on the surface (64) of a silicon carbide substrate (50). The alignment mark (51) is used to reflect a light signal (72) to determine the proper position for the silicon carbide substrate (50). The materials that are used to form the alignment mark (51) can be used to form an alignment mark on any transparent or semi-transparent substrate and will maintain physical integrity through very high temperature processing steps.Type: GrantFiled: May 9, 2000Date of Patent: October 7, 2003Assignee: Motorola, Inc.Inventors: David P. Mancini, Douglas J. Resnick, Harland G. Tompkins, Karen E. Moore
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Publication number: 20030162406Abstract: An improved and novel method of forming a tiered structure, such as a T-gate structure, including the fabrication of a stabilized resist layer that provides for the prevention of interlayer intermixing with the deposition of subsequent resist layers. The method includes patterning a base resist layer to provide for an opening which will form the stem of the tiered structure and subsequently stabilizing the resist base layer without deforming the stem opening. Next, a resist stack is deposited on an uppermost surface of the stabilized resist layer. Patterning the resist stack provides for an opening on an uppermost layer or portion, and a reentrant profile in a portion of the resist stack adjacent the stabilized resist layer. Metallization and subsequent removal of the resist layers results in a tiered structure, such as a T-gate structure, formed using only low to medium molecular weight, linear polymeric materials such as those used in positive optical resists in optical lithography.Type: ApplicationFiled: February 22, 2002Publication date: August 28, 2003Inventors: Kathleen Ann Gehoski, Laura Popovich, David P. Mancini, Doug J. Resnick
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Publication number: 20030113638Abstract: This invention relates to a lithographic template, a method of forming the lithographic template and a method for forming devices with the lithographic template. The lithographic template (10, 110, 210) is formed having a substrate (12, 112, 212) and a charge dissipation layer (20, 120, 220), and a patterned imageable relief layer, (16, 116, 216) formed on a surface (14, 114, 214) of the substrate (10, 110, 210) using radiation. The template (10, 110, 210) is used in the fabrication of a semiconductor device (344) for affecting a pattern in the device (344) by positioning (338) the template (10, 11, 210) in close proximity to semiconductor device (344) having a radiation sensitive material (334) formed thereon and applying a pressure (340) to cause the radiation sensitive material to flow into the relief image present on the template (10, 110, 210).Type: ApplicationFiled: December 18, 2001Publication date: June 19, 2003Inventors: David P. Mancini, Douglas J. Resnick, Carlton Grant Willson
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Patent number: 6580172Abstract: The lithographic template is formed having a substrate, an optional etch stop layer formed on a surface of the substrate, and a patterning layer formed on a surface of the etch stop layer. The template is used in the fabrication of a semiconductor device for affecting a pattern in the device by positioning the template in close proximity to the semiconductor device having a radiation sensitive material formed thereon and applying a pressure to cause the radiation sensitive material to flow into the relief image present on the template. Radiation is then applied through the template so as to further cure portions of the radiation sensitive material and further define the pattern in the radiation sensitive material. The template is then removed to complete fabrication of the semiconductor device.Type: GrantFiled: March 21, 2002Date of Patent: June 17, 2003Assignee: Motorola, Inc.Inventors: David P. Mancini, Doug J. Resnick, William J. Dauksher
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Patent number: 6576520Abstract: An improved and novel semiconductor device including an amorphous carbon layer for improved adhesion of photoresist and method of fabrication. The device includes a substrate having a surface, a carbon layer, formed on the surface of the substrate, and a resist layer formed on a surface of the carbon layer. The device is formed by providing a substrate having a surface, depositing a carbon layer on the surface of the substrate using plasma enhanced chemical vapor deposition (PECVD) or sputtering, and forming a resist layer on a surface of the carbon layer.Type: GrantFiled: January 7, 2002Date of Patent: June 10, 2003Assignee: Motorola, Inc.Inventors: David P. Mancini, Steven M. Smith, Douglas J. Resnick
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Patent number: 6562553Abstract: A method of contact printing on a device using a partially transparent mask (18) having first and second surfaces, comprises the steps of applying a layer of low surface energy polymeric material (22) to the first surface of the mask; placing the first surface (24) of the mask contiguous to the device (10), the layer of low surface energy polymeric material being substantially in contact with the device; and applying radiation (32) to the second surface of the mask for affecting a pattern in the device.Type: GrantFiled: May 10, 2001Date of Patent: May 13, 2003Assignee: Motorola, Inc.Inventors: David P. Mancini, Douglas J. Resnick
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Publication number: 20020122995Abstract: This invention relates to semiconductor devices, microelectronic devices, micro electro mechanical devices, microfluidic devices, and more particularly to a lithographic template, a method of forming the lithographic template and a method for forming devices with the lithographic template. The lithographic template (10) is formed having a substrate (12), an optional etch stop layer (16) formed on a surface (14) of the substrate (12), and a patterning layer (20) formed on a surface (18) of the etch stop layer (16). The template (10) is used in the fabrication of a semiconductor device (30) for affecting a pattern in device (30) by positioning the template (10) in close proximity to semiconductor device (30) having a radiation sensitive material formed thereon and applying a pressure to cause the radiation sensitive material to flow into the relief image present on the template.Type: ApplicationFiled: March 21, 2002Publication date: September 5, 2002Inventors: David P. Mancini, Doug J. Resnick, William J. Dauksher
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Publication number: 20020058383Abstract: An improved and novel semiconductor device including an amorphous carbon layer for improved adhesion of photoresist and method of fabrication. The device includes a substrate having a surface, a carbon layer, formed on the surface of the substrate, and a resist layer formed on a surface of the carbon layer. The device is formed by providing a substrate having a surface, depositing a carbon layer on the surface of the substrate using plasma enhanced chemical vapor deposition (PECVD) or sputtering, and forming a resist layer on a surface of the carbon layer.Type: ApplicationFiled: January 7, 2002Publication date: May 16, 2002Inventors: David P. Mancini, Steven M. Smith, Douglas J. Resnick
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Patent number: 6387787Abstract: This invention relates to semiconductor devices, microelectronic devices, micro electro mechanical devices, microfluidic devices, and more particularly to a lithographic template, a method of forming the lithographic template and a method for forming devices with the lithographic template. The lithographic template (10) is formed having a substrate (12), an optional etch stop layer (16) formed on a surface (14) of the substrate (12), and a patterning layer (20) formed on a surface (18) of the etch stop layer (16). The template (10) is used in the fabrication of a semiconductor device (30) for affecting a pattern in device (30) by positioning the template (10) in close proximity to semiconductor device (30) having a radiation sensitive material formed thereon and applying a pressure to cause the radiation sensitive material to flow into the relief image present on the template.Type: GrantFiled: March 2, 2001Date of Patent: May 14, 2002Assignee: Motorola, Inc.Inventors: David P. Mancini, Doug J. Resnick, William J. Dauksher