Patents by Inventor David P. Meier

David P. Meier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11925365
    Abstract: An orthopaedic surgical instrument includes a patella trial and drill guide that may be used to both perform a surgical trial of the patellofemoral joint and guide the surgeon in drilling a number of anchor holes in the patella of the patient.
    Type: Grant
    Filed: March 19, 2020
    Date of Patent: March 12, 2024
    Assignee: DePuy Ireland Unlimited Company
    Inventors: Matthew S. Wallace, Jennifer B. Wyant, Richard S. Jones, David S. Barrett, Michael J. Rock, Abraham P. Wright, Olen J. Borkholder, Robert S. Gorab, Rusty T. Meier
  • Patent number: 11919020
    Abstract: Methods of dispensing fluid are disclosed. A first applicator is positioned above a first dispense site at a first dispense region of a first electronic substrate by moving the first applicator using a primary positioner. A second applicator is simultaneously positioned above a first dispense site at a second dispense region of the first electronic substrate by moving the second applicator together with the first applicator using the primary positioner and moving the second applicator relative to the first applicator using a secondary positioner. It is then determined that the first or the second dispense region is misaligned relative to the other of the first or the second dispense region.
    Type: Grant
    Filed: November 15, 2022
    Date of Patent: March 5, 2024
    Assignee: Nordson Corporation
    Inventors: Christopher L Giusti, Philip P. Maiorca, Mark S. Meier, David N. Padgett
  • Patent number: 4527237
    Abstract: A data processing system comprising an active and intelligent main store including a main memory, a main store controller for accessing the main memory in a manner allowing different address and data structures, and a main store bus connected to the controller. At least one processor of a first type is connected to the main store bus, this being an auxiliary processor for performing input-output and other operations. At least one processor of a second type also is connected to the main store bus, this being an execution processor for fetching, decoding and executing instructions. All or some of either or both of the auxiliary processors and execution processors may be different. A supervisory processor for initiating configuring and monitoring the system is connected to the main store bus. A communication bus is connected to the processors of the first and second types and to the supervisory processor. A diagnostic bus connects the supervisory processor to each of the processors of the first and second types.
    Type: Grant
    Filed: April 14, 1983
    Date of Patent: July 2, 1985
    Assignee: Nanodata Computer Corporation
    Inventors: Gideon Frieder, David T. Hughes, Mark H. Kline, John T. Liebel, Jr., David P. Meier, Edward A. Wolff
  • Patent number: 4516199
    Abstract: A data processing system comprising an active and intelligent main store including a main memory, a main store controller for accessing the main memory in a manner allowing different address and data structures, and a main store bus connected to the controller. At least one processor of a first type is connected to the main store bus, this being an auxiliary processor for performing input-output and other operations. At least one processor of a second type also is connected to the main store bus, this being an execution processor for fetching, decoding and executing instructions. All or some of either or both of the auxiliary processors and execution processors may be different. A supervisory processor for initiating configuring and monitoring the system is connected to the main store bus. A communication bus is connected to the processors of the first and second types and to the supervisory processor. A diagnostic bus connects the supervisory processor to each of the processors of the first and second types.
    Type: Grant
    Filed: December 5, 1980
    Date of Patent: May 7, 1985
    Assignee: Nanodata Computer Corporation
    Inventors: Gideon Frieder, David T. Hughes, Mark H. Kline, John T. Liebel, Jr., David P. Meier, Edward A. Wolff
  • Patent number: 4354225
    Abstract: A data processing system comprising an active and intelligent main store including a main memory, a main store controller for accessing the main memory in a manner allowing different address and data structures, and a main store bus connected to the controller. At least one processor of a first type is connected to the main store bus, this being an auxiliary processor for performing input-output and other operations. At least one processor of a second type also is connected to the main store bus, this being an execution processor for fetching, decoding and executing instructions. All or some of either or both of the auxiliary processors and execution processors may be different. A supervisory processor for initiating configuring and monitoring the system is connected to the main store bus. A communication bus is connected to the processors of the first and second types and to the supervisory processor. A diagnostic bus connects the supervisory processor to each of the processors of the first and second types.
    Type: Grant
    Filed: October 11, 1979
    Date of Patent: October 12, 1982
    Assignee: Nanodata Computer Corporation
    Inventors: Gideon Frieder, David T. Hughes, Mark H. Kline, John T. Liebel, Jr., David P. Meier, Edward A. Wolff