Patents by Inventor David Pardoe

David Pardoe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240143416
    Abstract: Embodiments of the disclosed technologies receive first event data associated with a first party application, receive second event data representing a click, in the first party application, on a link to a third party application, receive third event data from the third party application, convert the third event data to a label, map a compressed format of the labeled third event data to the first event data and the second event data to create multi-party attribution data, group multiple instances of the multi-party attribution data into a batch, add noise to the compressed format of the labeled third event data in the batch, and send the noisy batch to a second computing device. A debiasing algorithm can be applied to the noisy batch. The debiased noisy batch can be used to train at least one machine learning model.
    Type: Application
    Filed: November 1, 2022
    Publication date: May 2, 2024
    Inventors: Ryan M. Rogers, Man Chun D. Leung, David Pardoe, Bing Liu, Shawn F. Ren, Rahul Tandra, Parvez Ahammad, Jing Wang, Ryan T. Tecco, Yajun Wang
  • Publication number: 20220206955
    Abstract: A translation lookaside buffer (TLB) having a fixed sub-TLB and a configurable sub-TLB and methods of using the TLB are provided. The TLB includes a fixed sub-TLB and a configurable sub-TLB. The fixed sub-TLB, during runtime, may store a first plurality of TLB entries corresponding to a first page size set. The configurable sub-TLB, during runtime, is configurable to store a second plurality of TLB entries of a second page size set. The second page size set includes at least a first page size of the first page size set and includes at least a second page size not of the first page size set.
    Type: Application
    Filed: December 26, 2020
    Publication date: June 30, 2022
    Inventor: David Pardo Keppel
  • Publication number: 20220058619
    Abstract: Registration information for a plurality of consumers is obtained at an electronic wallet platform. A mechanism is provided to integrate the electronic wallet platform with a plurality of merchants. Via the electronic wallet platform, a given one of the consumers is afforded an option to select from multiple methods to pay for a transaction with a given one of the merchants. The multiple methods are based, at least in part, on the registration information. At least one of the multiple methods includes a virtual card number. Further steps include obtaining, from the given one of the consumers, a selection of the virtual card number for payment for the transaction; and providing the given one of the merchants with the virtual card number.
    Type: Application
    Filed: November 1, 2021
    Publication date: February 24, 2022
    Inventors: David Pardo, Anand Shekaran, Jose A. Alba, Michael J. Shaon, Aimee G. Musil, Michael S. Ameiss, Eric R. Kitchen
  • Patent number: 11222329
    Abstract: Registration information for a plurality of consumers is obtained at an electronic wallet platform. A mechanism is provided to integrate the electronic wallet platform with a plurality of merchants. Via the electronic wallet platform, a given one of the consumers is afforded an option to select from multiple methods to pay for a transaction with a given one of the merchants. The multiple methods are based, at least in part, on the registration information. At least one of the multiple methods includes a virtual card number. Further steps include obtaining, from the given one of the consumers, a selection of the virtual card number for payment for the transaction; and providing the given one of the merchants with the virtual card number.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: January 11, 2022
    Assignee: MASTERCARD INTERNATIONAL INCORPORATED
    Inventors: David Pardo, Anand Shekaran, Jose A. Alba, Michael J. Shaon, Aimee G. Musil, Michael S. Ameiss, Eric R. Kitchen
  • Patent number: 11093861
    Abstract: Techniques for controlling item frequency using machine learning are provides. In one technique, two prediction models are trained: one based on interaction history of multiple content items by multiple entities and the other based on predicted interaction rates and an impression count for each of multiple content items. In response to a request, a particular entity associated with the request is identified and multiple candidate content items are identified. For each identified candidate content item, the first prediction model is used to determine a predicted interaction rate, an impression count of the candidate content item is determined with respect to the particular entity, the second prediction model is used to generate an adjustment based on the impression count, and an adjusted entity interaction rate is generated based on the predicted interaction rate and the adjustment. A particular candidate content item is selected based on the generated adjusted entity interaction rates.
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: August 17, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Jinyun Yan, Vinay Praneeth Boda, Yin Zhang, David Pardoe
  • Patent number: 11055751
    Abstract: Techniques for controlling resource usage in a computing environment are provided. In one technique, a target resource usage for a particular point in time is determined for a content delivery campaign. Determining, for the content delivery campaign, a current resource usage for the particular point in time. Also, a bandwidth associated with the target resource usage at the particular point in time is determined. Based on a difference between the current resource usage and one or more boundaries of the bandwidth, a throttling factor is calculated. Based on the throttling factor, a probability of the content delivery campaign participating in a content item selection event is determined.
    Type: Grant
    Filed: May 31, 2017
    Date of Patent: July 6, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Jan Schellenberger, Yang Zhao, Yin Zhang, David Pardoe
  • Patent number: 11055232
    Abstract: A processor includes a translation lookaside buffer (TLB) to store a TLB entry, wherein the TLB entry comprises a first set of valid bits to identify if the first TLB entry corresponds to a virtual address from a memory access request, wherein the valid bits are set based on a first page size associated with the TLB entry from a first set of different page sizes assigned to a first probe group; and a control circuit to probe the TLB for each page size of the first set of different page sizes assigned to the first probe group in a single probe cycle to determine if the TLB entry corresponds to the virtual address from the memory access request.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: July 6, 2021
    Assignee: Intel Corporation
    Inventors: David Pardo Keppel, Binh Pham
  • Publication number: 20210035151
    Abstract: Techniques for using attention events for audience expansion are provided. In one technique, first interaction data that indicates multiple interactions by the first entity with multiple content items is stored. The interactions includes an interaction that is based on an amount of time that content within one of the content items was presented to the first entity. Based on the first interaction data, similarity data that identifies one or more content delivery campaigns that are similar to a particular content delivery campaign is generated. Second interaction data that indicates interaction(s) by a second entity with content item(s) is stored. Based on the second interaction data and the similarity data, association data that associates the second entity with the particular content delivery campaign is stored. The association data may be used to identify the particular campaign in response to receiving a content request from a computing device of the second entity.
    Type: Application
    Filed: July 31, 2019
    Publication date: February 4, 2021
    Inventors: Liu Yang, David Pardoe, Ruoyan Wang, Onkar A. Dalal
  • Publication number: 20200302333
    Abstract: Techniques for controlling item frequency using machine learning are provides. In one technique, two prediction models are trained: one based on interaction history of multiple content items by multiple entities and the other based on predicted interaction rates and an impression count for each of multiple content items. In response to a request, a particular entity associated with the request is identified and multiple candidate content items are identified. For each identified candidate content item, the first prediction model is used to determine a predicted interaction rate, an impression count of the candidate content item is determined with respect to the particular entity, the second prediction model is used to generate an adjustment based on the impression count, and an adjusted entity interaction rate is generated based on the predicted interaction rate and the adjustment. A particular candidate content item is selected based on the generated adjusted entity interaction rates.
    Type: Application
    Filed: March 20, 2019
    Publication date: September 24, 2020
    Inventors: Jinyun Yan, Vinay Praneeth Boda, Yin Zhang, David Pardoe
  • Patent number: 10743077
    Abstract: Techniques for accounting for position-specific differences in user interaction while conducting content item selection events are provided. In one technique, a position-specific factor is determined. The position-specific factor may be based on a ratio of an observed interaction and a predicted interaction. Different positions in a content item feed or on a web page may be associated with different position-specific factors. Eventually, multiple content items are identified for presentation on a screen of a computing device. The content items include a first content item for which a predicted interaction rate is calculated and a second content item for which no predicted interaction rate is calculated. An order of the content items is determined based on the position-specific factor. For example, the predicted interaction rate of the first content item is modified based on the position-specific factor. The content items are presented on the screen based on the order.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: August 11, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Lijun Peng, David Pardoe, Yuan Gao, Jinyun Yan
  • Publication number: 20200204868
    Abstract: Techniques for accounting for position-specific differences in user interaction while conducting content item selection events are provided. In one technique, a position-specific factor is determined. The position-specific factor may be based on a ratio of an observed interaction and a predicted interaction. Different positions in a content item feed or on a web page may be associated with different position-specific factors. Eventually, multiple content items are identified for presentation on a screen of a computing device. The content items include a first content item for which a predicted interaction rate is calculated and a second content item for which no predicted interaction rate is calculated. An order of the content items is determined based on the position-specific factor. For example, the predicted interaction rate of the first content item is modified based on the position-specific factor. The content items are presented on the screen based on the order.
    Type: Application
    Filed: December 19, 2018
    Publication date: June 25, 2020
    Inventors: Lijun Peng, David Pardoe, Yuan Gao, Jinyun Yan
  • Publication number: 20200134663
    Abstract: Techniques are provided for automatically adjusting a resource reduction amount based on resource availability and other factors. The following are determined for a content delivery campaign: a winning distribution for a target audience of the content delivery campaign, a through rate distribution of the content delivery campaign, a resource allocation of the content delivery campaign, and an estimated number of content item selection events in which the content delivery campaign will participate in a future time period. Based on these values, a resource reduction amount is determined. An example of a resource reduction amount is an effective cost per impression. The resource reduction amount is used in one or more subsequent content item selection events in which the content delivery campaign participates.
    Type: Application
    Filed: October 31, 2018
    Publication date: April 30, 2020
    Inventors: Yuan Gao, David Pardoe, Lijun Peng, Jinyun Yan
  • Publication number: 20190227947
    Abstract: A processor includes a translation lookaside buffer (TLB) to store a TLB entry, wherein the TLB entry comprises a first set of valid bits to identify if the first TLB entry corresponds to a virtual address from a memory access request, wherein the valid bits are set based on a first page size associated with the TLB entry from a first set of different page sizes assigned to a first probe group; and a control circuit to probe the TLB for each page size of the first set of different page sizes assigned to the first probe group in a single probe cycle to determine if the TLB entry corresponds to the virtual address from the memory access request.
    Type: Application
    Filed: March 29, 2019
    Publication date: July 25, 2019
    Inventors: David Pardo Keppel, Binh Pham
  • Patent number: 10168765
    Abstract: In an embodiment, a processor includes a logic to cause at least one core to operate with a power control cycle including a plurality of on times and a plurality of off times according to an ON-OFF keying protocol, where the off times each correspond to a maximum off time for a platform including the processor. Other embodiments are described and claimed.
    Type: Grant
    Filed: May 3, 2016
    Date of Patent: January 1, 2019
    Assignee: Intel Corporation
    Inventors: David Pardo Keppel, Jawad Nasrullah
  • Publication number: 20180349964
    Abstract: Techniques for controlling resource usage in a computing environment are provided. In one technique, a target resource usage for a particular point in time is determined for a content delivery campaign. Determining, for the content delivery campaign, a current resource usage for the particular point in time. Also, a bandwidth associated with the target resource usage at the particular point in time is determined. Based on a difference between the current resource usage and one or more boundaries of the bandwidth, a throttling factor is calculated. Based on the throttling factor, a probability of the content delivery campaign participating in a content item selection event is determined.
    Type: Application
    Filed: May 31, 2017
    Publication date: December 6, 2018
    Inventors: Jan Schellenberger, Yang Zhao, Yin Zhang, David Pardoe
  • Patent number: 10061587
    Abstract: A processor includes a front end, a decoder, an allocator, and a retirement unit. The decoder includes logic to identify an end-of-live-range (EOLR) indicator. The EOLR indicator specifies an architectural register and a location in code for which the architectural register is unused. The allocator includes logic to scan for a mapping of the architectural register to a physical register, based upon the EOLR indicator. The allocator also includes logic to generate a request to disassociate the architectural register from the physical register. The retirement unit includes logic to disassociate the architectural register from the physical register.
    Type: Grant
    Filed: September 25, 2014
    Date of Patent: August 28, 2018
    Assignee: Intel Corporation
    Inventors: David Pardo Keppel, Denis M. Khartikov, Fernando LaTorre, Marc Lupon, Grigorios Magklis, Naveen Neelakantam, Georgios Tournavitis, Polychronis Xekalakis
  • Publication number: 20160320832
    Abstract: In an embodiment, a processor includes a logic to cause at least one core to operate with a power control cycle including a plurality of on times and a plurality of off times according to an ON-OFF keying protocol, where the off times each correspond to a maximum off time for a platform including the processor. Other embodiments are described and claimed.
    Type: Application
    Filed: May 3, 2016
    Publication date: November 3, 2016
    Inventors: David Pardo Keppel, Jawad Nasrullah
  • Patent number: 9477628
    Abstract: A collective communication apparatus and method for parallel computing systems. For example, one embodiment of an apparatus comprises a plurality of processor elements (PEs); collective interconnect logic to dynamically form a virtual collective interconnect (VCI) between the PEs at runtime without global communication among all of the PEs, the VCI defining a logical topology between the PEs in which each PE is directly communicatively coupled to a only a subset of the remaining PEs; and execution logic to execute collective operations across the PEs, wherein one or more of the PEs receive first results from a first portion of the subset of the remaining PEs, perform a portion of the collective operations, and provide second results to a second portion of the subset of the remaining PEs.
    Type: Grant
    Filed: September 28, 2013
    Date of Patent: October 25, 2016
    Assignee: Intel Corporation
    Inventors: Allan D. Knies, David Pardo Keppel, Dong Hyuk Woo, Joshua B. Fryman
  • Publication number: 20160179662
    Abstract: A processor includes a binary translator, a memory management unit, and a monitor unit. The binary translator includes logic to translate a region of code and to reorder translated instructions within the region to produce a transaction. The memory management unit includes logic to receive a memory instruction from the transaction to access an address in memory, determine whether the address is associated with a previous page table walk during execution of the transaction based on bits set for addresses during the previous page table walk, and allow execution of the memory instruction based upon the determination whether the address is associated with the previous page table walk. The monitor unit includes logic to specify whether a given address is associated with the previous page table walk during execution of the transaction.
    Type: Application
    Filed: December 23, 2014
    Publication date: June 23, 2016
    Inventors: David Pardo Keppel, John H. Kelm
  • Patent number: 9354694
    Abstract: In an embodiment, a processor includes a logic to cause at least one core to operate with a power control cycle including a plurality of on times and a plurality of off times according to an ON-OFF keying protocol, where the off times each correspond to a maximum off time for a platform including the processor. Other embodiments are described and claimed.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: May 31, 2016
    Assignee: Intel Corporation
    Inventors: David Pardo Keppel, Jawad Nasrullah