Patents by Inventor David Peppy

David Peppy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Intelligent embedded power rail and control signal sequencer
    Patent number: 7728627
    Abstract: A power sequencing method may use a state machine in a programmable sequencer to program relative timing of signals to activate different power rails attached to an integrated circuit. Input lines may specify the sequencing program. Alternatively, the programmable sequencer may use an EEPROM or other computer-readable medium to program itself with a particular image of the sequencing program. The programmable sequencer may be implemented by a Field Programmable Gate Array (FPGA).
    Type: Grant
    Filed: September 4, 2008
    Date of Patent: June 1, 2010
    Assignee: Alcatel Lucent
    Inventors: Don Pike, David Peppy, John Madsen
  • INTELLIGENT EMBEDDED POWER RAIL AND CONTROL SIGNAL SEQUENCER
    Publication number: 20100052766
    Abstract: A power sequencing method may use a state machine in a programmable sequencer to program relative timing of signals to activate different power rails attached to an integrated circuit. Input lines may specify the sequencing program. Alternatively, the programmable sequencer may use an EEPROM or other computer-readable medium to program itself with a particular image of the sequencing program. The programmable sequencer may be implemented by a Field Programmable Gate Array (FPGA).
    Type: Application
    Filed: September 4, 2008
    Publication date: March 4, 2010
    Applicant: ALCATEL LUCENT
    Inventors: Dion PIKE, David Peppy, John Madsen
  • FLEXIBLE HARDWARE UPGRADE MECHANISM FOR DATA COMMUNICATIONS EQUIPMENT
    Publication number: 20100058274
    Abstract: Partial reconfiguration of programmable logic devices may be achieved in a hardware-controlled manner without relying upon software. Upon installation of a new memory module, partial reconfiguration may enable alteration of a clock frequency without affecting operation of the software. When a new interface is installed, partial reconfiguration will allow a programmable logic device to adapt to either a serial or parallel interface before executing a standard boot-up sequence for the computer system.
    Type: Application
    Filed: September 4, 2008
    Publication date: March 4, 2010
    Applicant: ALCATEL LUCENT
    Inventors: Dion PIKE, David Peppy, John Madsen