Abstract: A fully balanced transimpedance amplifier for high speed and low voltage applications is provided. An input stage of the amplifier uses a matched pair of common source connected transistors with sources tied directly to ground to eliminate the Vds overhead usually found in differential pairs. The ground connection minimizes a source resistance noise component, while matching minimizes power supply noise generation and susceptibility for an array of amplifiers. Feedback resistors along with diode connected MESFETS determine the transimpedance of the amplifier. The nonlinearity of diodes helps to soften clipping. Transresistance also determined the noise generated by the amplifier, and the diode connected MESFETS offer lower noise than resistors for the same impedance. Stability is achieved through use of only a single stage of gain in a loop of the input stage, while additional gain is achieved through cascading in the input stage.

Abstract: A gallium arsenide (GaAs) bandgap circuit includes a plurality of stacked GaAs transistors being connected as Schottky diodes which, together with an amplifier, provide a constant reference voltage being independent of a power supply voltage of the circuit.

Abstract: An improved method and apparatus are provided for dc offset trim adjustment of a variable gain amplifier. The VGA has predetermined overall gain endpoints. A minimum gain and a maximum gain are identified for the VGA in a preferred operational range. The identified minimum gain and the identified maximum gain for the VGA in the preferred operational range are spaced apart inwardly from the VGA predetermined overall gain endpoints. The minimum gain for the VGA in operation is set, then trim adjustment of the VGA is provided to minimize an output of the VGA. Then the maximum gain for the VGA in operation is set, then dc offset trim adjustment of the VGA is provided to minimize an output of the VGA.

Abstract: An analog output buffer circuit having a low quiescent power dissipation and a high current-driving capability is disclosed. In accordance with a preferred embodiment of the present invention, the analog output buffer circuit includes a capacitor and three transistors. The first transistor is coupled between a power supply and an output. The gate of the first transistor is utilized for receiving input signals. The second transistor is coupled between the output and ground. The capacitor is coupled between a gate of the first transistor and a gate of the second transistor such that voltages at the gate of the first transistor are related to voltages at the gate of the second transistor via the capacitor. Finally, the third transistor is coupled between the gate of the second transistor and a current source. This configuration allows the analog output buffer circuit to have a high current-driving capability while maintaining a low power dissipation during the quiescent period.