Abstract: Provided herein are systems and methods for imaging using a microscope system comprising removeable or replaceable component parts. Such systems and methods employ semi-kinetic coupling for easy, tool-free attachment of the microscope system to a baseplate. Systems and methods provided herein may comprise simultaneous imaging and stimulation using a microscope system. The microscope system can have a relatively small size compared to an average microscope system.

Abstract: A memory device includes a plurality of memory blocks, each block with multiple memory cells. Each memory block has an address and a block read threshold. The plurality of memory blocks is partitioned into clusters based on block read thresholds. The memory device also has a look-up table for storing information associating each cluster of memory blocks with a corresponding cluster read threshold. The look-up table further includes cluster boundaries defined in values of device status parameters. The memory device is configured to receive a read command to read a memory block with a read address and identify a cluster for the memory block with the read address. The memory device is also configured to select a cluster read threshold for the identified cluster from the look-up table, and use the selected cluster read threshold to perform a read operation of the memory block.

Abstract: Disclosed are techniques for selecting one or more reference voltages for performing one or more operations on a memory cell based on a determined layer of a three-dimensional memory construct to which the memory cell belongs. The one or more operations can include read or write operations. The memory cell can be a flash memory cell.

Abstract: A memory system includes a plurality of memory channels, each of the plurality of memory channels includes a plurality of memory dies and a die processor, each of the plurality of memory dies includes a plurality of memory blocks; and a memory controller including a monarch processor, coupled to the plurality of memory channels, wherein the die processor on each of the plurality of memory channels is configured in parallel to process to find last written data within at least a predetermined block of the plurality of memory dies; and provide information regarding the last written data to the monarch processor, the monarch processor determines which boot record to be used to identify firmware images based on the information.

Abstract: Techniques for codeword decoding are described. In an example, a system accesses information about a block of a storage device of the system. The block includes data lines and redundant lines. The data lines are available to store data and include a bad data line that is unreliable for data storage. The redundant lines include a redundant line that replaces the bad data line, and a free redundant line that remains available after replacement of all bad data lines from the data lines. The information includes an identifier of the bad data line and an identifier of the free redundant line. The system accesses a codeword stored in the block. A portion of the codeword is stored in the free redundant line. The system decodes the codeword based on the identifier of the bad data line and the identifier of the free redundant line.

Abstract: An apparatus of a memory system and an operating method thereof includes a plurality of memory devices; and a controller coupled with the plurality of memory devices, configured to determine a range of read reference voltages having a plurality of read reference voltages, the read reference voltages achieving a minimal rBER; calculate an optimal read reference voltage in accordance with at least the range of read reference voltages; achieve a rBER in accordance with at least the optimal read reference voltage; and execute error correction process with at least the optimal read reference voltage.

Abstract: Disclosed are techniques for determining a threshold number of read operations on memory depending on one or more conditions of the memory. If a number of read operations for the memory meets the threshold number of read operations, a read reclaim operation can be performed to preserve data stored therein.

Abstract: An apparatus of a memory system and an operating method thereof includes a plurality of memory devices; and a controller coupled to the plurality of memory devices, wherein the controller is configured to perform a symmetric OVS read with at least an initial read threshold, and create a symmetric read result; perform an asymmetric OVS read with at least the initial read threshold, and create an asymmetric read result; adjust the initial read threshold according to at least the symmetric read result and asymmetric read result, and create an optimal read threshold; and execute data recovery process with the optimal read threshold.

Abstract: Disclosed are techniques for selecting one or more reference voltages for performing one or more operations on a memory cell based on a determined layer of a three-dimensional memory construct to which the memory cell belongs. The one or more operations can include read or write operations. The memory cell can be a flash memory cell.

Abstract: An apparatus of a memory system and an operating method thereof includes a plurality of memory devices; and a controller coupled with the plurality of memory devices, configured to determine a range of read reference voltages having a plurality of read reference voltages, the read reference voltages achieving a minimal rBER; calculate an optimal read reference voltage in accordance with at least the range of read reference voltages; achieve a rBER in accordance with at least the optimal read reference voltage; and execute error correction process with at least the optimal read reference voltage.

Abstract: Techniques for codeword decoding are described. In an example, a system accesses information about a block of a storage device of the system. The block includes data lines and redundant lines. The data lines are available to store data and include a bad data line that is unreliable for data storage. The redundant lines include a redundant line that replaces the bad data line, and a free redundant line that remains available after replacement of all bad data lines from the data lines. The information includes an identifier of the bad data line and an identifier of the free redundant line. The system accesses a codeword stored in the block. A portion of the codeword is stored in the free redundant line. The system decodes the codeword based on the identifier of the bad data line and the identifier of the free redundant line.

Abstract: An apparatus of a memory system and an operating method thereof includes a plurality of memory devices; and a controller coupled to the plurality of memory devices, wherein the controller is configured to perform a symmetric OVS read with at least an initial read threshold, and create a symmetric read result; perform an asymmetric OVS read with at least the initial read threshold, and create an asymmetric read result; adjust the initial read threshold according to at least the symmetric read result and asymmetric read result, and create an optimal read threshold; and execute data recovery process with the optimal read threshold.

Abstract: Disclosed are techniques for determining a threshold number of read operations on memory depending on one or more conditions of the memory. If a number of read operations for the memory meets the threshold number of read operations, a read reclaim operation can be performed to preserve data stored therein.

Abstract: A memory system includes a plurality of memory channels, each of the plurality of memory channels includes a plurality of memory dies and a die processor, each of the plurality of memory dies includes a plurality of memory blocks; and a memory controller including a monarch processor, coupled to the plurality of memory channels, wherein the die processor on each of the plurality of memory channels is configured in parallel to process to find last written data within at least a predetermined block of the plurality of memory dies; and provide information regarding the last written data to the monarch processor, the monarch processor determines which boot record to be used to identify firmware images based on the information.

Abstract: A memory device includes a plurality of memory blocks, each block with multiple memory cells. Each memory block has an address and a block read threshold. The plurality of memory blocks is partitioned into clusters based on block read thresholds. The memory device also has a look-up table for storing information associating each cluster of memory blocks with a corresponding cluster read threshold. The look-up table further includes cluster boundaries defined in values of device status parameters. The memory device is configured to receive a read command to read a memory block with a read address and identify a cluster for the memory block with the read address. The memory device is also configured to select a cluster read threshold for the identified cluster from the look-up table, and use the selected cluster read threshold to perform a read operation of the memory block.

Abstract: An apparatus and method for operating a Multiple Input Multiple Output (MIMO)-capable subscriber node are disclosed. In one embodiment, an apparatus includes a MIMO-capable physical layer transceiver and a Medium Access Control (MAC) layer block that measures a received transmission to determine channel conditions. Upon receiving a transmission wherein said channel conditions meet specified conditions, the MAC layer block transmits a message to an access point indicating that the apparatus wants to switch between a non-MIMO mode and a MIMO mode, and upon receiving an acknowledgement, the MAC layer block switches between the non-MIMO mode and the MIMO mode. An apparatus for operating an access node is also disclosed.

Abstract: Multiple Input Multiple Output (MIMO) technology in conjunction with the IEEE 802.11 standard enables simultaneous communication of data packets to or from multiple users in the same frequency. Spatial divisional multiple access (SDMA) is thus provided. In this way, system capacity can be increased to an extent that depends on available antenna resources and the multipath characteristics of the communication channel. Doubling or quadrupling of network throughput can be achieved.

Abstract: A specialized preamble is provided to facilitate matrix channel estimation of a MIMO channel. In a particular implementation, a channel training preamble provided by the IEEE 802.11a standard is modified to facilitate MIMO channel estimation.

Abstract: Multiple Input Multiple Output (MIMO) technology in conjunction with the IEEE 802.11 standard enables simultaneous communication of data packets to or from multiple users in the same frequency. Spatial divisional multiple access (SDMA) is thus provided. In this way, system capacity can be increased to an extent that depends on available antenna resources and the multipath characteristics of the communication channel. Doubling or quadrupling of network throughput can be achieved.

Abstract: A specialized preamble is provided to facilitate matrix channel estimation of a MIMO channel. In a particular implementation, a channel training preamble provided by the IEEE 802.11a standard is modified to facilitate MIMO channel estimation.