Patents by Inventor David Pritchard
David Pritchard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250250874Abstract: Device (10) for guiding a user to mark a core sample (12) carried by a core tube (14), the device (10) including: a housing (20) mountable relative to the core sample (12) or the core tube (14) and having a marking guide (22) configured to be arranged adjacent the core sample (12) to guide marking; a communications module (26) operable to communicate with the downhole tool (16) to receive data; a user interface (28) operable to convey perceptible feedback to the user; and a processor (30) and associated memory (32). The processor (30) is configured to store data in the memory (32) and determine a marking position based on the data, and operate the user interface (28) to direct the user to cause relative rotation of the marking guide (22) and the core sample (12) so that the marking guide (22) is aligned with the marking position, allowing the user to use the marking guide (22) to mark the core sample (12) at the marking position.Type: ApplicationFiled: April 6, 2023Publication date: August 7, 2025Inventors: Nicholas COPLIN, Andrew MARCH, Neil Anthony MORRISH, James Barry REILLY, Jacob PETERSEN, Mark GABBITUS, Grainne SMITH, Nicholas PAYNE, Pauline NEWLOVE, David PRITCHARD, Aaron Huy NGUYEN, Brendyn RODGERS
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Patent number: 12364000Abstract: Device structures for a high-voltage semiconductor device and methods of forming such device structures. The structure comprises a layer stack including a first dielectric layer and a second dielectric layer. The first dielectric layer includes a portion between the second dielectric layer and a semiconductor substrate. The structure further comprises a field-effect transistor including a first source/drain region in the semiconductor substrate, a second source/drain region in the semiconductor substrate, and a gate electrode on the layer stack. The gate electrode is laterally between the first and second source/drain regions, and the gate electrode overlaps with the portion of the first dielectric layer and the second dielectric layer. The structure further comprises a spacer laterally between the first source/drain region and the second dielectric layer.Type: GrantFiled: September 4, 2024Date of Patent: July 15, 2025Assignee: GlobalFoundries U.S. Inc.Inventors: Hong Yu, David Pritchard, Zhenyu Hu, Navneet Jain
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Patent number: 12356675Abstract: A planar transistor device is disclosed including a gate structure positioned above a semiconductor substrate, the semiconductor substrate comprising a substantially planar upper surface, a channel region, a source region, a drain region, and at least one layer of a two-dimensional (2D) material that is positioned in at least one of the source region, the drain region or the channel region, wherein the layer of 2D material has a substantially planar upper surface, a substantially planar bottom surface and a substantially uniform vertical thickness across an entire length of the layer of 2D material in the gate length direction and across an entire width of the layer of 2D material in the gate width direction, wherein the substantially planar upper surface and the substantially planar bottom surface of the layer of 2D material are positioned approximately parallel to a substantially planar surface of the semiconductor substrate.Type: GrantFiled: January 3, 2023Date of Patent: July 8, 2025Assignee: GlobalFoundries U.S. Inc.Inventors: David Pritchard, Heng Yang, Hongru Ren, Neha Nayyar, Manjunatha Prabhu, Elizabeth Strehlow, Salvatore Cimino
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Publication number: 20250173495Abstract: Layout design for an electronic device may be performed by providing a representation of a first layout to a client and providing, in response to an input from the client, a collection of design information calculated according to the first layout to the client. The collection of design information may include a dimension extracted from the first layout, and may further include parasitics information related to the dimension, margin information related to a ground rule applicable to the dimension, or both. The collection of design information may be provided to the client as a real-time response to inputs received from the client. By providing the parasitics information, the margin information, or both to the client, the design of sub-ground-rule layouts may be performed in less time and using fewer resources than would otherwise be the case.Type: ApplicationFiled: November 27, 2023Publication date: May 29, 2025Inventors: Collin TRANTER, Romain FEUILLETTE, David PRITCHARD, Navneet JAIN, Nolan PAVEK, Stephen T. BURGESS
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Publication number: 20240234448Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a gate electrode, an isolation structure, and an electrode plate. The gate electrode is over the substrate and the isolation structure is in contact with the gate electrode. The electrode plate is in the isolation structure.Type: ApplicationFiled: January 9, 2023Publication date: July 11, 2024Inventors: DAVID PRITCHARD, HONG YU, ZHIXING ZHAO
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Publication number: 20240170560Abstract: Structures that include bipolar junction transistors and methods of forming such structures. The structure comprises a semiconductor layer, a substrate, and a dielectric layer disposed between the semiconductor layer and the substrate. The structure further comprises a first bipolar junction transistor including a first collector in the substrate, a first emitter, and a first base layer. The first base layer extends through the dielectric layer from the first emitter to the first collector. The structure further comprises a second bipolar junction transistor including a second collector in the substrate, a second emitter, and a second base layer. The second base layer extends through the dielectric layer from the second emitter to the second collector. The second base layer is connected to the first base layer by a section of the semiconductor layer to define a base line.Type: ApplicationFiled: November 21, 2022Publication date: May 23, 2024Inventors: Alexander Derrickson, Venkatesh Gopinath, John J. Pekarik, Hong Yu, Vibhor Jain, David Pritchard
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Publication number: 20240162090Abstract: Structures with features formed by self-aligned double patterning and methods of self-aligned multiple patterning. The structure comprises a first field-effect transistor including a first gate and a first protrusion projecting laterally from the first gate, and a second field-effect transistor including a second gate and a second protrusion projecting laterally from the second gate. The second gate and the second protrusion are spaced in a lateral direction from the first gate and the first protrusion. The structure further comprises a gate contact connecting the first protrusion of the first gate to the second protrusion the second gate.Type: ApplicationFiled: November 11, 2022Publication date: May 16, 2024Inventors: James Mazza, David Pritchard, Romain Feuillette, Elizabeth Strehlow, Hongru Ren
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Publication number: 20240120373Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a first gate electrode, a second gate electrode, and an isolation structure. The first gate electrode is over the substrate and the second gate electrode is laterally adjacent thereto. The isolation structure is in contact with the first gate electrode and the second gate electrode.Type: ApplicationFiled: October 11, 2022Publication date: April 11, 2024Inventors: HONG YU, DAVID PRITCHARD
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Publication number: 20240063225Abstract: A substrate is provided. The substrate includes a base, a semiconductor layer over the base, and an insulator layer between the base and the semiconductor layer. The semiconductor layer has a first semiconductor layer portion having a first thickness, a second semiconductor layer portion having a second thickness, and a third semiconductor layer portion having a third thickness, and the first thickness, the second thickness, and the third thickness are different from each other.Type: ApplicationFiled: August 17, 2022Publication date: February 22, 2024Inventors: DAVID PRITCHARD, HONGRU REN, SHAFIULLAH SYED, HONG YU, MAN GU, JIANWEI PENG
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Patent number: 11785015Abstract: A system for verifying a user's request to access a resource determines a set of entitlement attributes from the request. The set of entitlement requests indicates a type of permission to access a particular resource, including at least one of a write-access and a read-access to the particular resource. The system determines whether there is any rule that is violated by the set of entitlement attributes. In response to determining that there is at least one rule that is violated by the set of entitlement attributes, the system denies the request.Type: GrantFiled: February 24, 2021Date of Patent: October 10, 2023Assignee: Bank of America CorporationInventors: David Pritchard, Matthew Peach, Swapnil S. Palkar, Rajesh M. Gopinathapai
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Patent number: 11755927Abstract: Aspects of the disclosure relate to identifying entitlement rules based on a frequent pattern tree. A computing platform may retrieve entitlement data associated with a relational database, where the entitlement data is indicative of user entitlements to computing resources in an enterprise network. Then, the computing platform may generate, for the entitlement data, a frequent pattern tree. Then, the computing platform may compare a pair of branches and may detect a pattern associated with a pair of entitlements. Then, the computing platform may determine, based on the frequent pattern tree, a frequency of occurrence of the pattern. Then, the computing platform may identify, based on the frequency of occurrence, a rule associated with the pattern. Subsequently, the computing platform may trigger, via the computing device and based on the rule, an action related to one or more of the entitlements of the pair of entitlements.Type: GrantFiled: August 23, 2019Date of Patent: September 12, 2023Assignee: Bank of America CorporationInventors: David Pritchard, Rajesh Gopinathapai, Jennifer Lynn Greenwald
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Publication number: 20230237390Abstract: A computer-implemented method for automated forecasting of cash flow includes: monitoring, while a plurality of first transactions are being processed in a payment network, payable transaction data associated with the plurality of first transactions, the plurality of first transactions initiated with at least one account issued to a merchant; monitoring, while a plurality of second transactions are being processed in a payment network, receivable transaction data associated with the plurality of second transactions, the plurality of second transactions between the merchant and a plurality of users; determining, based on the payable transaction data and the receivable transaction data, a plurality of seasonal variables; and generating a cash flow forecast associated with the merchant, the cash flow forecast generated based on the plurality of seasonal variables. A system and computer program product for automated forecasting of cash flow are also disclosed.Type: ApplicationFiled: March 24, 2023Publication date: July 27, 2023Inventors: Anup Tripathi, Robert David Pritchard, JR., Yinle Zhou, Suman Mukherjee
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Publication number: 20230147981Abstract: A planar transistor device is disclosed including a gate structure positioned above a semiconductor substrate, the semiconductor substrate comprising a substantially planar upper surface, a channel region, a source region, a drain region, and at least one layer of a two-dimensional (2D) material that is positioned in at least one of the source region, the drain region or the channel region, wherein the layer of 2D material has a substantially planar upper surface, a substantially planar bottom surface and a substantially uniform vertical thickness across an entire length of the layer of 2D material in the gate length direction and across an entire width of the layer of 2D material in the gate width direction, wherein the substantially planar upper surface and the substantially planar bottom surface of the layer of 2D material are positioned approximately parallel to a substantially planar surface of the semiconductor substrate.Type: ApplicationFiled: January 3, 2023Publication date: May 11, 2023Inventors: David Pritchard, Heng Yang, Hongru Ren, Neha Nayyar, Manjunatha Prabhu, Elizabeth Strehlow, Salvatore Cimino
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Patent number: 11636403Abstract: A computer-implemented method for automated forecasting of cash flow includes: monitoring, while a plurality of first transactions are being processed in a payment network, payable transaction data associated with the plurality of first transactions, the plurality of first transactions initiated with at least one account issued to a merchant; monitoring, while a plurality of second transactions are being processed in a payment network, receivable transaction data associated with the plurality of second transactions, the plurality of second transactions between the merchant and a plurality of users; determining, based on the payable transaction data and the receivable transaction data, a plurality of seasonal variables; and generating a cash flow forecast associated with the merchant, the cash flow forecast generated based on the plurality of seasonal variables. A system and computer program product for automated forecasting of cash flow are also disclosed.Type: GrantFiled: June 27, 2019Date of Patent: April 25, 2023Assignee: Visa International Service AssociationInventors: Anup Tripathi, Robert David Pritchard, Jr., Yinle Zhou, Suman Mukherjee
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Patent number: 11610843Abstract: An illustrative device disclosed herein includes a doped well region and a conductive well tap conductively coupled to the doped well region, the conductive well tap including first and second opposing sidewall surfaces. In this example the device also includes a first sidewall spacer that has a first vertical height positioned around the conductive well tap and a second sidewall spacer positioned adjacent the first sidewall spacer along the first and second opposing sidewall surfaces of the conductive well tap, wherein the second sidewall spacer has a second vertical height that is less than the first vertical height.Type: GrantFiled: March 8, 2021Date of Patent: March 21, 2023Assignee: GLOBALFOUNDRIES U.S. Inc.Inventors: Hongru Ren, David Pritchard, Ryan W. Sporer, Manjunatha Prabhu
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Patent number: 11581430Abstract: A planar transistor device is disclosed including a gate structure positioned above a semiconductor substrate, the semiconductor substrate comprising a substantially planar upper surface, a channel region, a source region, a drain region, and at least one layer of a two-dimensional (2D) material that is positioned in at least one of the source region, the drain region or the channel region, wherein the layer of 2D material has a substantially planar upper surface, a substantially planar bottom surface and a substantially uniform vertical thickness across an entire length of the layer of 2D material in the gate length direction and across an entire width of the layer of 2D material in the gate width direction, wherein the substantially planar upper surface and the substantially planar bottom surface of the layer of 2D material are positioned approximately parallel to a substantially planar surface of the semiconductor substrate.Type: GrantFiled: August 22, 2019Date of Patent: February 14, 2023Assignee: GLOBALFOUNDRIES U.S. Inc.Inventors: David Pritchard, Heng Yang, Hongru Ren, Neha Nayyar, Manjunatha Prabhu, Elizabeth Strehlow, Salvatore Cimino
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Publication number: 20220330621Abstract: A unit for mixing and dispensing an aerosol precursor composition, and containers to be dispensed therefrom. The unit includes a plurality of bulk material filling stations, the plurality of bulk material filling stations have at least one first filling station with aerosol former and at least one second filling station with a flavor material for creating the aerosol precursor. The unit also includes a bulk consumable pack staging a plurality of containers configured to receive the aerosol precursor, and a robot configured to retrieve a container from the bulk consumable pack and move the container through at least two dimensions to stop at at least two of the plurality of bulk material filling stations.Type: ApplicationFiled: July 5, 2022Publication date: October 20, 2022Inventors: Andries Don Sebastian, Charles Jacob Novak, III, Alvaro Gonzalez-Parra, Eugenia Theophilus, Marielle Anitra Keyna Des Etages, Joseph Dominique, Wesley S. Jones, Bradley Phillips, Mark Dockrill, Simon A. English, Simon Philip Adam Higgins, Thomas Crugnale, Jeffrey Hughes, Robert Neil, David Pritchard
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Publication number: 20220285274Abstract: An illustrative device disclosed herein includes a doped well region and a conductive well tap conductively coupled to the doped well region, the conductive well tap including first and second opposing sidewall surfaces. In this example the device also includes a first sidewall spacer that has a first vertical height positioned around the conductive well tap and a second sidewall spacer positioned adjacent the first sidewall spacer along the first and second opposing sidewall surfaces of the conductive well tap, wherein the second sidewall spacer has a second vertical height that is less than the first vertical height.Type: ApplicationFiled: March 8, 2021Publication date: September 8, 2022Inventors: Hongru Ren, David Pritchard, Ryan W. Sporer, Manjunatha Prabhu
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Patent number: 11432594Abstract: A unit for mixing and dispensing an aerosol precursor composition, and containers to be dispensed therefrom. The unit includes a plurality of bulk material filling stations, the plurality of bulk material filling stations have at least one first filling station with aerosol former and at least one second filling station with a flavor material for creating the aerosol precursor. The unit also includes a bulk consumable pack staging a plurality of containers configured to receive the aerosol precursor, and a robot configured to retrieve a container from the bulk consumable pack and move the container through at least two dimensions to stop at at least two of the plurality of bulk material filling stations.Type: GrantFiled: June 9, 2020Date of Patent: September 6, 2022Assignee: RAI Strategic Holdings, Inc.Inventors: Andries Don Sebastian, Charles Jacob Novak, III, Alvaro Gonzalez-Parra, Eugenia Theophilus, Marielle Anitra Keyna des Etages, Joseph Dominique, Wesley Steven Jones, Bradley Phillips, Mark Dockrill, Simon A. English, Simon Philip Adam Higgins, Thomas Crugnale, Jeffrey Hughes, Robert Neil, David Pritchard
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Publication number: 20220272094Abstract: A system for verifying a user's request to access a resource determines a set of entitlement attributes from the request. The set of entitlement requests indicates a type of permission to access a particular resource, including at least one of a write-access and a read-access to the particular resource. The system determines whether there is any rule that is violated by the set of entitlement attributes. In response to determining that there is at least one rule that is violated by the set of entitlement attributes, the system denies the request.Type: ApplicationFiled: February 24, 2021Publication date: August 25, 2022Inventors: David Pritchard, Matthew Peach, Swapnil S. Palkar, Rajesh M. Gopinathapai