Patents by Inventor David Q. Wright
David Q. Wright has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7687793Abstract: An inverted PCRAM cell is formed by plating the bottom electrode, made of copper for example, with a conductive material, such as silver. Chalcogenide material is disposed over the plated electrode and subjected to a conversion process so that ions from the plated material diffuse into the chalcogenide material.Type: GrantFiled: May 22, 2007Date of Patent: March 30, 2010Assignee: Micron Technology, Inc.Inventors: Steven T. Harshfield, David Q. Wright
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Patent number: 7235419Abstract: An inverted PCRAM cell is formed by plating the bottom electrode, made of copper for example, with a conductive material, such as silver. Chalcogenide material is disposed over the plated electrode and subjected to a conversion process so that ions from the plated material diffuse into the chalcogenide material.Type: GrantFiled: December 14, 2005Date of Patent: June 26, 2007Assignee: Micron Technology, Inc.Inventors: Steven T. Harshfield, David Q. Wright
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Patent number: 7102150Abstract: An inverted PCRAM cell is formed by plating the bottom electrode, made of copper for example, with a conductive material, such as silver. Chalcogenide material is disposed over the plated electrode and subjected to a conversion process so that ions from the plated material diffuse into the chalcogenide material.Type: GrantFiled: May 11, 2001Date of Patent: September 5, 2006Inventors: Steven T. Harshfield, David Q. Wright
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Patent number: 7071021Abstract: An inverted PCRAM cell is formed by plating the bottom electrode, made of copper for example, with a conductive material, such as silver. Chalcogenide material is disposed over the plated electrode and subjected to a conversion process so that ions from the plated material diffuse into the chalcogenide material.Type: GrantFiled: July 25, 2002Date of Patent: July 4, 2006Assignee: Micron Technology, Inc.Inventors: Steven T. Harshfield, David Q. Wright
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Patent number: 6833046Abstract: Planarizing machines and methods for selectively using abrasive slurries on fixed-abrasive planarizing pads in mechanical and/or chemical-mechanical planarization of microelectronic substrate assemblies. In one embodiment of a method in accordance with the invention, a microelectronic substrate is planarized by positioning a fixed-abrasive planarizing pad on a table of a planarizing machine, covering at least a portion of a planarizing surface on the pad with a first abrasive planarizing solution during a first stage of a planarizing cycle, and then adjusting a concentration of the abrasive particles on the planarizing surface at a second stage of the planarizing cycle after the first stage. The concentration of the second abrasive particles can be adjusted during the second stage of the planarizing cycle by coating the planarizing surface with a non-abrasive second planarizing solution without abrasive particles during the second stage.Type: GrantFiled: January 24, 2002Date of Patent: December 21, 2004Assignee: Micron Technology, Inc.Inventor: David Q. Wright
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Patent number: 6768213Abstract: A method and system for protecting global alignment marks during the fabrication of wafers are described. A semiconductor wafer-in-process includes a substrate having one or more global alignment sites, each site having an alignment mark. A photoresist material is deposited over the wafer-in-process, including over the alignment marks. A stepper or other suitable device exposes full field images over the entire wafer-in-process, thus exposing a portion of the photoresist material covering the alignment marks which is developed. A globule of protective material is deposited over the patterned photoresist over the alignment marks, thus protecting them during a subsequent etching step. The globule of protective material can also be deposited over a portion of any other adjacent structures which need protection during etching.Type: GrantFiled: November 28, 2001Date of Patent: July 27, 2004Assignee: Micron Technology, Inc.Inventors: Richard D. Holscher, Ziad R. Hatab, David Q. Wright
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Publication number: 20020190289Abstract: An inverted PCRAM cell is formed by plating the bottom electrode, made of copper for example, with a conductive material, such as silver. Chalcogenide material is disposed over the plated electrode and subjected to a conversion process so that ions from the plated material diffuse into the chalcogenide material.Type: ApplicationFiled: July 25, 2002Publication date: December 19, 2002Inventors: Steven T. Harshfield, David Q. Wright
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Publication number: 20020168852Abstract: An inverted PCRAM cell is formed by plating the bottom electrode, made of copper for example, with a conductive material, such as silver. Chalcogenide material is disposed over the plated electrode and subjected to a conversion process so that ions from the plated material diffuse into the chalcogenide material.Type: ApplicationFiled: May 11, 2001Publication date: November 14, 2002Inventors: Steven T. Harshfield, David Q. Wright
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Patent number: 6417076Abstract: A method and system for protecting global alignment marks during the fabrication of wafers are described. A semiconductor wafer-in-process includes a substrate having one or more global alignment sites, each site having an alignment mark. A photoresist material is deposited over the wafer-in-process, including over the alignment marks. A stepper or other suitable device exposes full field images over the entire wafer-in-process, thus exposing a portion of the photoresist material covering the alignment marks which is developed. A globule of protective material is deposited over the patterned photoresist over the alignment marks, thus protecting them during a subsequent etching step. The globule of protective material can also be deposited over a portion of any other adjacent structures which need protection during etching.Type: GrantFiled: June 5, 2000Date of Patent: July 9, 2002Assignee: Micron Technology, Inc.Inventors: Richard D. Holscher, Ziad R. Hatab, David Q. Wright
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Publication number: 20020069967Abstract: Planarizing machines and methods for selectively using abrasive slurries on fixed-abrasive planarizing pads in mechanical and/or chemical-mechanical planarization of microelectronic substrate assemblies. In one embodiment of a method in accordance with the invention, a microelectronic substrate is planarized by positioning a fixed-abrasive planarizing pad on a table of a planarizing machine, covering at least a portion of a planarizing surface on the pad with a first abrasive planarizing solution during a first stage of a planarizing cycle, and then adjusting a concentration of the abrasive particles on the planarizing surface at a second stage of the planarizing cycle after the first stage. The concentration of the second abrasive particles can be adjusted during the second stage of the planarizing cycle by coating the planarizing surface with a non-abrasive second planarizing solution without abrasive particles during the second stage.Type: ApplicationFiled: January 24, 2002Publication date: June 13, 2002Inventor: David Q. Wright
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Patent number: 6387289Abstract: Planarizing machines and methods for selectively using abrasive slurries on fixed-abrasive planarizing pads in mechanical and/or chemical-mechanical planarization of microelectronic substrate assemblies. In one embodiment of a method in accordance with the invention, a microelectronic substrate is planarized by positioning a fixed-abrasive planarizing pad on a table of a planarizing machine, covering at least a portion of a planarizing surface on the pad with a first abrasive planarizing solution during a first stage of a planarizing cycle, and then adjusting a concentration of the abrasive particles on the planarizing surface at a second stage of the planarizing cycle after the first stage. The concentration of the second abrasive particles can be adjusted during the second stage of the planarizing cycle by coating the planarizing surface with a non-abrasive second planarizing solution without abrasive particles during the second stage.Type: GrantFiled: May 4, 2000Date of Patent: May 14, 2002Assignee: Micron Technology, Inc.Inventor: David Q. Wright
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Publication number: 20020052091Abstract: A method and system for protecting global alignment marks during the fabrication of wafers are described. A semiconductor wafer-in-process includes a substrate having one or more global alignment sites, each site having an alignment mark. A photoresist material is deposited over the wafer-in-process, including over the alignment marks. A stepper or other suitable device exposes full field images over the entire wafer-in-process, thus exposing a portion of the photoresist material covering the alignment marks which is developed. A globule of protective material is deposited over the patterned photoresist over the alignment marks, thus protecting them during a subsequent etching step. The globule of protective material can also be deposited over a portion of any other adjacent structures which need protection during etching.Type: ApplicationFiled: November 28, 2001Publication date: May 2, 2002Inventors: Richard D. Holscher, Ziad R. Hatab, David Q. Wright
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Patent number: 6309282Abstract: An abrasive polishing pad for planarizing a substrate. In one embodiment, the abrasive polishing pad has a planarizing surface with a first planarizing region and a second planarizing region. The first planarizing region has a first abrasiveness and the second planarizing region has a second abrasiveness different than the first abrasiveness of the first region. The polishing pad preferably has a plurality of abrasive elements at the planarizing surface in at least one of the first or second planarizing regions. The abrasive elements may be abrasive particles fixedly suspended in a suspension medium, contact/non-contact regions on the pad, or other elements that mechanically remove material from the wafer.Type: GrantFiled: September 8, 2000Date of Patent: October 30, 2001Assignee: Micron Technology, Inc.Inventors: David Q. Wright, John K. Skrovan
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Patent number: 6251785Abstract: An apparatus and method for preventing gimballing in the polishing of a semiconductor wafer held in an overhanging position with respect to a polishing pad. One embodiment includes a support apparatus for use with a device for polishing a semiconductor wafer, the device having a rotatable wafer carrier and a polishing pad attached to a rotatable platen, the wafer carrier being movable to place a semiconductor wafer held by the wafer carrier in a contacting and overhanging relationship with the polishing pad. The support apparatus includes a support to prevent gimballing of the wafer carrier when the wafer held by the wafer carrier is in the overhanging and contacting relationship with the polishing pad, the support having a low polishing surface to contact and support the semiconductor wafer.Type: GrantFiled: June 10, 1999Date of Patent: June 26, 2001Assignee: Micron Technology, Inc.Inventor: David Q. Wright
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Patent number: 6186870Abstract: An abrasive polishing pad for planarizing a substrate. In one embodiment, the abrasive polishing pad has a planarizing surface with a first planarizing region and a second planarizing region. The first planarizing region has a first abrasiveness and the second planarizing region has a second abrasiveness different than the first abrasiveness of the first region. The polishing pad preferably has a plurality of abrasive elements at the planarizing surface in at least one of the first or second planarizing regions. The abrasive elements may be abrasive particles fixedly suspended in a suspension medium, contact/non-contact regions on the pad, or other elements that mechanically remove material from the wafer.Type: GrantFiled: August 19, 1999Date of Patent: February 13, 2001Assignee: Micron Technology, Inc.Inventors: David Q. Wright, John K. Skrovan
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Patent number: 6062958Abstract: An abrasive polishing pad for planarizing a substrate. In one embodiment, the abrasive polishing pad has a planarizing surface with a first planarizing region and a second planarizing region. The first planarizing region has a first abrasiveness and the second planarizing region has a second abrasiveness different than the first abrasiveness of the first region. The polishing pad preferably has a plurality of abrasive elements at the planarizing surface in at least one of the first or second planarizing regions. The abrasive elements may be abrasive particles fixedly suspended in a suspension medium, contact/non-contact regions on the pad, or other elements that mechanically remove material from the wafer.Type: GrantFiled: April 4, 1997Date of Patent: May 16, 2000Assignee: Micron Technology, Inc.Inventors: David Q. Wright, John K. Skrovan
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Patent number: 5945347Abstract: An apparatus and method for preventing gimballing in the polishing of a semiconductor wafer held in an overhanging position with respect to a polishing pad. One embodiment includes a support apparatus for use with a device for polishing a semiconductor wafer, the device having a rotatable wafer carrier and a polishing pad attached to a rotatable platen, the wafer carrier being movable to place a semiconductor wafer held by the wafer carrier in a contacting and overhanging relationship with the polishing pad. The support apparatus includes a support to prevent gimballing of the wafer carrier when the wafer held by the wafer carrier is in the overhanging and contacting relationship with the polishing pad, the support having a low polishing surface to contact and support the semiconductor wafer.Type: GrantFiled: June 2, 1995Date of Patent: August 31, 1999Assignee: Micron Technology, Inc.Inventor: David Q. Wright
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Patent number: 5882248Abstract: The present invention is a planarizing machine for use in chemical-mechanical planarization of semiconductor wafers that has a moveable platen, a polishing pad, a wafer carrier, and a wafer separator. The polishing pad is positioned on the platen, and it has a planarizing surface with an operational zone upon which the wafer may be planarized. The wafer carrier holds a wafer and is positionable opposite the polishing pad to engage the wafer with the operational zone of the polishing pad. The wafer separator engages either the polishing pad, the wafer, or the wafer carrier to urge a portion of the wafer away from the pad.Type: GrantFiled: August 13, 1997Date of Patent: March 16, 1999Assignee: Micron Technology, Inc.Inventors: David Q. Wright, Mike Walker, Karl M. Robinson
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Patent number: 5658190Abstract: The present invention is a planarizing machine for use in chemical-mechanical planarization of semiconductor wafers that has a moveable platen, a polishing pad, a wafer carrier, and a wafer separator. The polishing pad is positioned on the platen, and it has a planarizing surface with an operational zone upon which the wafer may be planarized. The wafer carrier holds a wafer and is positionable opposite the polishing pad to engage the wafer with the operational zone of the polishing pad. The wafer separator engages either the polishing pad, the wafer, or the wafer carrier to urge a portion of the wafer away from the pad.Type: GrantFiled: December 15, 1995Date of Patent: August 19, 1997Assignee: Micron Technology, Inc.Inventors: David Q. Wright, Mike Walker, Karl M. Robinson