Abstract: An improved method of preparing an ion exchange resin catalyst by partial neutralization of the ion exchange resin catalyst with a promoter. The promoter and a fluid are introduced into a vessel or a reactor which is partially filled with the ion exchange resin catalyst forming an ion exchange resin catalyst bed in the vessel or reactor. The fluid and the promoter are recirculated in an upflow direction at a velocity sufficient to partially fluidize the ion exchange resin catalyst bed and to achieve a rapid uniform distribution of the promoter throughout the catalyst bed.

Abstract: An improved method of preparing an ion exchange resin catalyst by partial neutralization of the ion exchange resin catalyst with a promoter. The promoter and a fluid are introduced into a vessel or a reactor which is partially filled with the ion exchange resin catalyst forming an ion exchange resin catalyst bed in the vessel or reactor. The fluid and the promoter are recirculated in an upflow direction at a velocity sufficient to partially fluidize the ion exchange resin catalyst bed and to achieve a rapid uniform distribution of the promoter throughout the catalyst bed.

Abstract: The present invention relates to the areas of communication and/or identification of remote devices (active or passive). The invention has application where there is a need to identify or communicate with more than one remote device. The remote device may be embodied as a transmitter arrangement, transducer, transponder or responder. In particular, the present invention calls for each remote device to include a transmitter means in which, at each transmission, a carrier frequency or medium is newly selected.

Abstract: A successive-approximation register (SAR) has a single shift register for processing, that is presetting and selectively resetting, a number of bits. The single shift register is arranged to provide bit selection for processing the bits and also to provide desired result accumulation in the processed bits. Further, the single shift register comprises an array of stages, the stages including a first stage, a last stage and a number of active stages equal to the number of bits of digital output. Conveniently, the SAR adopts a "One-bits to Right" test implemented by a Manchester Carry Chain in the opposite direction to the shift direction.

Abstract: An identification system comprising a transponder having receiver means adapted to extract powering energy from a surrounding electromagnet field, transponder transmitter means adapted to transmit at least one unique signal from the transponder, frequency generating means for generating a plurality of pre-determined frequencies, each frequency adapted to carry the signal from the transmitter means to an interrogator receiver means adapted to receive said signals to achieve identification of said transponder, said transponder transmitting signals successively or repetitively using at each successive or repetitive transmission a newly selected frequency or set of newly selected frequencies.

Abstract: In switching a CMOS circuit comprising first and second switchable logic elements the first logic element is enabled so as to allow it to reach a steady logic state and the second logic element is not enabled until the first logic element reaches a substantially steady logic state. The current drawn by the circuit at any time is thereby reduced.

Abstract: A synchronous rectifier comprising: switch means responsive to a control signal for selectively providing conduction of an applied AC signal, and driver means responsive to the applied AC signal and adapted to provide said control signal in synchronism with the applied AC signal, wherein the rectifier is integratable into VLSI "chip" form.

Abstract: An integratable phase locked loop (IPLL) comprising sampled data filter means adapted to receive a first reference signal, the filter means sampling the first reference signal (Ref In) to provide a second reference signal (Control Volts Out), and voltage or current controlled oscillator (VCO) means adapted to receive said second reference signal, the second signal serving to regulate the frequency of oscillation of the oscillator, the oscillator providing as an output a digital signal which is fed back to the filter means to provide a clock signal (CLK) for said sampling.

Abstract: A regulator is provided for receiving electrical power from an external alternating magnetic field and developing a regulated output voltage. The regulator is operatively coupled to a resonant inductive circuit for obtaining input power. It includes a circuit for regulating output power by shunting input power and providing separate current paths for shunt current and output current. The circuit includes a rectifier in the output current path. The regulator is integrated on a single VLSI chip.

Abstract: A unitized grease seal. The seal member has a one-piece metal case having a cylindrical bore-sealing portion and a radial flange, and a molded elastomeric member bonded to the metal case to provide a portion bonded to the radial flange and an outer generally cylindrical portion bonded to the surface of the bore-sealing portion and providing a series of spaced apart inwardly extending retaining portions. The elastomeric member also has two diverging lip portions with a cavity between them, one providing a grease retention lip having small spaced-apart shallow indentations enabling passage of small amounts of grease into the cavity, the other lip portion having a polytetrafluoroethylene insert bonded thereto.