Patents by Inventor David R. Brown

David R. Brown has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160199134
    Abstract: A system and method for performing a procedure is disclosed. The procedure may include preparing one or more bones for a prosthetic implant. The method may include provide instructions to a user for using identified instruments to perform a procedure. Instructions and may be provided for settings of adjustable instruments.
    Type: Application
    Filed: January 12, 2015
    Publication date: July 14, 2016
    Inventors: David R. BROWN, Troy W. Hershberger
  • Patent number: 9389841
    Abstract: A state machine engine includes a state vector system. The state vector system includes an input buffer configured to receive state vector data from a restore buffer and to provide state vector data to a state machine lattice. The state vector system also includes an output buffer configured to receive state vector data from the state machine lattice and to provide state vector data to a save buffer.
    Type: Grant
    Filed: July 18, 2012
    Date of Patent: July 12, 2016
    Assignee: Micron Technology, Inc.
    Inventors: David R. Brown, Harold B Noyes
  • Publication number: 20160188346
    Abstract: A device including a data analysis element including a plurality of memory cells. The memory cells analyze at least a portion of a data stream and output a result of the analysis. The device also includes a detection cell. The detection cell includes an AND gate. The AND gate receives result of the analysis as a first input. The detection cell also includes a D flip-flop including an output coupled to a second input of the AND gate.
    Type: Application
    Filed: March 7, 2016
    Publication date: June 30, 2016
    Inventors: David R. Brown, Harold B. Noyes
  • Publication number: 20160124860
    Abstract: A data analysis system to analyze data. The data analysis system includes a data buffer configured to receive data to be analyzed. The data analysis system also includes a state machine lattice. The state machine lattice includes multiple data analysis elements and each data analysis element includes multiple memory cells configured to analyze at least a portion of the data and to output a result of the analysis. The data analysis system includes a buffer interface configured to receive the data from the data buffer and to provide the data to the state machine lattice.
    Type: Application
    Filed: January 11, 2016
    Publication date: May 5, 2016
    Inventors: David R. Brown, Harold B. Noyes, Inderjit Singh Bains
  • Patent number: 9329297
    Abstract: A receiver and tracking system for identifying a location of a magnetic field source. In a preferred embodiment a plurality of tri-axial antennas are positioned at three distinct points on a receiver frame. Each antenna detects a magnetic field from a source and a processor is used to determine a location of the source relative to the frame using the antenna signals. Each tri-axial antenna comprises three windings in each of three channels defined by a support structure. The windings each define an aperture area. The windings have substantially identical aperture areas and have a common center point. The receiver may to display to the operator the relative location of the field source or may direct the operator to a spot directly above the field source.
    Type: Grant
    Filed: June 25, 2015
    Date of Patent: May 3, 2016
    Assignee: The Charles Machine Works, Inc.
    Inventors: Scott B. Cole, Brian J. Schrock, David R. Brown
  • Patent number: 9323994
    Abstract: Multi-level hierarchical routing matrices for pattern-recognition processors are provided. One such routing matrix may include one or more programmable and/or non-programmable connections in and between levels of the matrix. The connections may couple routing lines to feature cells, groups, rows, blocks, or any other arrangement of components of the pattern-recognition processor.
    Type: Grant
    Filed: December 15, 2009
    Date of Patent: April 26, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Harold B Noyes, David R. Brown
  • Patent number: 9304968
    Abstract: A state machine engine having a program buffer. The program buffer is configured to receive configuration data via a bus interface for configuring a state machine lattice. The state machine engine also includes a repair map buffer configured to provide repair map data to an external device via the bus interface. The state machine lattice includes multiple programmable elements. Each programmable element includes multiple memory cells configured to analyze data and to output a result of the analysis.
    Type: Grant
    Filed: July 18, 2012
    Date of Patent: April 5, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Harold B Noyes, David R. Brown
  • Patent number: 9280329
    Abstract: A device including a data analysis element including a plurality of memory cells. The memory cells analyze at least a portion of a data stream and output a result of the analysis. The device also includes a detection cell. The detection cell includes an AND gate. The AND gate receives result of the analysis as a first input. The detection cell also includes a D flip-flop including an output coupled to a second input of the AND gate.
    Type: Grant
    Filed: July 11, 2014
    Date of Patent: March 8, 2016
    Assignee: Micron Technology, Inc.
    Inventors: David R. Brown, Harold B Noyes
  • Patent number: 9275290
    Abstract: A device includes a routing buffer. The routing buffer includes a first port configured to receive a signal relating to an analysis of at least a portion of a data stream. The routing buffer also includes a second port configured to selectively provide the signal to a first routing line of a block of a state machine at a first time. The routing buffer further includes a third port configured to selectively provide the signal to a second routing line of the block of the state machine at the first time.
    Type: Grant
    Filed: March 24, 2014
    Date of Patent: March 1, 2016
    Assignee: Micron Technology, Inc.
    Inventors: David R. Brown, Harold B Noyes, Irene Junjuan Xu, Paul Glendenning
  • Patent number: 9235798
    Abstract: A data analysis system to analyze data. The data analysis system includes a data buffer configured to receive data to be analyzed. The data analysis system also includes a state machine lattice. The state machine lattice includes multiple data analysis elements and each data analysis element includes multiple memory cells configured to analyze at least a portion of the data and to output a result of the analysis. The data analysis system includes a buffer interface configured to receive the data from the data buffer and to provide the data to the state machine lattice.
    Type: Grant
    Filed: July 18, 2012
    Date of Patent: January 12, 2016
    Assignee: Micron Technology, Inc.
    Inventors: David R. Brown, Harold B Noyes, Inderjit Singh Bains
  • Publication number: 20150365091
    Abstract: Disclosed are methods and devices, among which is a device that includes a finite state machine lattice. The lattice may includes a programmable Boolean logic cell that may be programmed to perform various logic functions on a data stream. The programmability includes an inversion of a first input to the Boolean logic cell, an inversion of a last output of the Boolean logic cell, and a selection of an AND gate or an OR gate as a final output of the Boolean logic cell. The Boolean logic cell also includes end of data circuitry configured to cause the Boolean logic cell to only output after an end of data signifying the end of a data stream is received at the Boolean logic cell.
    Type: Application
    Filed: August 21, 2015
    Publication date: December 17, 2015
    Inventors: Harold B. Noyes, David R. Brown, Paul Glendenning, Irene Junjuan Xu
  • Publication number: 20150324129
    Abstract: A state machine engine includes a storage element, such as a (e.g., match) results memory. The storage element is configured to receive a result of an analysis of data. The storage element is also configured to store the result in a particular portion of the storage element based on a characteristic of the result. The storage element is additionally configured to store a result indicator corresponding to the result. Other state machine engines and methods are also disclosed.
    Type: Application
    Filed: June 30, 2015
    Publication date: November 12, 2015
    Inventors: David R. Brown, Harold B Noyes
  • Publication number: 20150323696
    Abstract: A receiver and tracking system for identifying a location of a magnetic field source. In a preferred embodiment a plurality of tri-axial antennas are positioned at three distinct points on a receiver frame. Each antenna detects a magnetic field from a source and a processor is used to determine a location of the source relative to the frame using the antenna signals. Each tri-axial antenna comprises three windings in each of three channels defined by a support structure. The windings each define an aperture area. The windings have substantially identical aperture areas and have a common center point. The receiver may to display to the operator the relative location of the field source or may direct the operator to a spot directly above the field source.
    Type: Application
    Filed: June 25, 2015
    Publication date: November 12, 2015
    Inventors: Scott B. Cole, Brian J. Schrock, David R. Brown
  • Publication number: 20150277907
    Abstract: State machine engines are disclosed, including those having an instruction insertion register. One such instruction insertion register may provide an initialization instruction, such as to prepare a state machine engine for data analysis. An instruction insertion register may also provide an instruction in an attempt to resolve an error that occurs during operation of a state machine engine. An instruction insertion register may also be used to debug a state machine engine, such as after the state machine experiences a fatal error.
    Type: Application
    Filed: June 10, 2015
    Publication date: October 1, 2015
    Inventor: David R. Brown
  • Patent number: 9135984
    Abstract: Disclosed are apparatuses and methods for writing data to a memory array of a buffer. One such apparatus may include a multiplexer that receives data words and a data mask. The multiplexer may change the order of the data words to group masked data words together and to group unmasked data words together. The multiplexer may also change the order of the data mask to group masking bits together and to group unmasking bits together. The apparatus may use the data words with the changed order and the data mask with the changed order to write data to the memory array.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: September 15, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Parthasarathy Gajapathy, David R. Brown
  • Publication number: 20150253755
    Abstract: Disclosed are methods and devices, among which is a device that includes a finite state machine lattice. The lattice may include a counter suitable for counting a number of times a programmable element in the lattice detects a condition. The counter may be configured to output in response to counting the condition was detected a certain number of times. For example, the counter may be configured to output in response to determining a condition was detected at least (or no more than) the certain number of times, determining the condition was detected exactly the certain number of times, or determining the condition was detected within a certain range of times. The counter may be coupled to other counters in the device for determining high-count operations and/or certain quantifiers.
    Type: Application
    Filed: May 27, 2015
    Publication date: September 10, 2015
    Inventors: Harold B. Noyes, David R. Brown, Paul Glendenning
  • Publication number: 20150250620
    Abstract: Disclosed is a modular trial system to select a neck length. The system may be in a hexagonal or click embodiments. A neck member may having at least a locating step with a locating step face. A head member may have at least a first groove and a second groove in an internal bore. The head member may be rotated relative to the neck member to select various trial lengths of the neck.
    Type: Application
    Filed: March 9, 2015
    Publication date: September 10, 2015
    Inventors: David R. BROWN, Aaron P. SMITH, Trent BAUTERS, Kirk J. BAILEY, John R. WHITE, Tony SIEBENECK
  • Patent number: 9118327
    Abstract: Disclosed are methods and devices, among which is a device that includes a finite state machine lattice. The lattice may includes a programmable Boolean logic cell that may be programmed to perform various logic functions on a data stream. The programmability includes an inversion of a first input to the Boolean logic cell, an inversion of a last output of the Boolean logic cell, and a selection of an AND gate or an OR gate as a final output of the Boolean logic cell. The Boolean logic cell also includes end of data circuitry configured to cause the Boolean logic cell to only output after an end of data signifying the end of a data stream is received at the Boolean logic cell.
    Type: Grant
    Filed: November 22, 2013
    Date of Patent: August 25, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Harold B Noyes, David R. Brown, Paul Glendenning, Irene Junjuan Xu
  • Patent number: 9075428
    Abstract: A state machine engine includes a storage element, such as a (e.g., match) results memory. The storage element is configured to receive a result of an analysis of data. The storage element is also configured to store the result in a particular portion of the storage element based on a characteristic of the result. The storage element is additionally configured to store a result indicator corresponding to the result. Other state machine engines and methods are also disclosed.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: July 7, 2015
    Assignee: Micron Technology, Inc.
    Inventors: David R. Brown, Harold B Noyes
  • Patent number: 9063532
    Abstract: State machine engines are disclosed, including those having an instruction insertion register. One such instruction insertion register may provide an initialization instruction, such as to prepare a state machine engine for data analysis. An instruction insertion register may also provide an instruction in an attempt to resolve an error that occurs during operation of a state machine engine. An instruction insertion register may also be used to debug a state machine engine, such as after the state machine experiences a fatal error.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: June 23, 2015
    Assignee: Micron Technology, Inc.
    Inventor: David R. Brown