Patents by Inventor David R. Czajkowski
David R. Czajkowski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10909254Abstract: Parties are enabled to exchange data without knowing the other party's encryption key. Cells in one party's database each form an object which is encrypted at the object level. Authentications and authorizations are incorporated into each object. An encryption management engine produces different keys for each objects. A security server database stores a key registered by one party. The in a later request by the party is compared to its registered key. A protocol and key management method allow identification and access to an appropriate key using only publicly available information. A set of data is added with a secured session key. A selected set of data is used to create a cryptographically secure Header-Tx with a secured session key and an Access Control List with an embedded security policy. Data is sent to a receiver only when authorized by the customer authentication security server.Type: GrantFiled: September 15, 2017Date of Patent: February 2, 2021Inventor: David R Czajkowski
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Publication number: 20190087595Abstract: Objects in separate cells or groups of cells in a database are encrypted individually. Respective authentications and authorizations are incorporated into each object. Data to be sent is encrypted at the object level. An encryption management engine produces different keys for each cell or range of cells within respective objects. A security server stores keys registered by a client. A client access request sent to the security server is compared to registered keys in a security server database. An encryption management engine produces different keys for respective objects. A protocol and key management method allow identification and access an appropriate key using only publicly available information. Two or more parties are enabled to exchange and manipulate data without knowing the other party's encryption key. A set of data is added with a secured session key.Type: ApplicationFiled: September 15, 2017Publication date: March 21, 2019Applicant: CYBER SPHERE DATA, INC.Inventor: DAVID R. CZAJKOWSKI
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Patent number: 9485229Abstract: A symmetric PGP encrypted communications path is provided in which the recipient may be identified with only publicly available information. Data to be encrypted is encrypted at the object level. Encryption keys for both the transmitter and receiver are sent to a security server. Data received from the transmitter includes intended receiver ID. The receiver includes its actual ID. The received ID and the actual ID are sent to the security server for authentication. If authentication succeeds, the security server sends a session key to the receiver, and the receiver can use its own key to decrypt data. The system reacts to authentication failure by disabling decryption in the receiver and may also take countermeasures.Type: GrantFiled: November 24, 2014Date of Patent: November 1, 2016Assignee: Space Micro, Inc.Inventor: David R. Czajkowski
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Patent number: 9236644Abstract: In an integrated circuit a microwave signal is routed through a selected signal path. Routing is accomplished by switching to determine the signal path. Control signals are applied remotely. The microwave integrated circuit is programmable by virtue of the ability to command selection of a signal path. The signal path is chosen to include or avoid selected “RF functional elements,” i.e., components through which radio frequency signals may be routed. RF functional elements may include, for example, amplifiers, mixers, attenuators, and phase shifters. Aspects of programmability in the integrated circuit include the provision of the functional circuit elements for selectable connection in signal paths, the switching and interconnect technologies used to switch and connect between them, and the arrangement of the functional circuit elements in relationship to each other.Type: GrantFiled: February 19, 2010Date of Patent: January 12, 2016Assignee: SPACE MICRO INC.Inventor: David R. Czajkowski
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Publication number: 20150200919Abstract: A symmetric PGP encrypted communications path is provided in which the recipient may be identified with only publicly available information. Data to be encrypted is encrypted at the object level. Encryption keys for both the transmitter and receiver are sent to a security server. Data received from the transmitter includes intended receiver ID. The receiver includes its actual ID. The received ID and the actual ID are sent to the security server for authentication. If authentication succeeds, the security server sends a session key to the receiver, and the receiver can use its own key to decrypt data. The system reacts to authentication failure by disabling decryption in the receiver and may also take countermeasures.Type: ApplicationFiled: November 24, 2014Publication date: July 16, 2015Applicant: Space Micro, Inc.Inventor: David R. Czajkowski
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Patent number: 8886994Abstract: A redundancy system in a fault tolerant computer comprises a multiple core processor which may support a real time operating system. The multiple core machine may be actual or virtual. Multiple identical instructions, e.g., three instructions, are executed redundantly so that the redundancy system can detect and recover from a single event upset (SEU). The instructions are also displaced in time. In one form, two non-consecutive instructions are run on one core which is virtualized into two cores. Alternatively, a second actual core may provide symmetric processing. The system prevents single event functional interrupts (SEFIs) from hanging up the processor. Each core may run a separate operating system. When a first core hangs up a first operating system, the second operating system takes over operation and the processor recovers. Embedded routines may store selected data variables in memory for later recovery and perform an SEFI “self-test” routine.Type: GrantFiled: December 3, 2010Date of Patent: November 11, 2014Assignee: Space Micro, Inc.Inventor: David R. Czajkowski
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Publication number: 20110208997Abstract: A redundancy system in a fault tolerant computer comprises a multiple core processor which may support a real time operating system. The multiple core machine may be actual or virtual. Multiple identical instructions, e.g., three instructions, are executed redundantly so that the redundancy system can detect and recover from a single event upset (SEU). The instructions are also displaced in time. In one form, two non-consecutive instructions are run on one core which is virtualized into two cores. Alternatively, a second actual core may provide symmetric processing. The system prevents single event functional interrupts (SEFIs) from hanging up the processor. Each core may run a separate operating system. When a first core hangs up a first operating system, the second operating system takes over operation and the processor recovers. Embedded routines may store selected data variables in memory for later recovery and perform an SEFI “self-test” routine.Type: ApplicationFiled: December 3, 2010Publication date: August 25, 2011Inventor: David R. Czajkowski
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Publication number: 20100231321Abstract: In an integrated circuit a microwave signal is routed through a selected signal path. Routing is accomplished by switching to determine the signal path. Control signals are applied remotely. The microwave integrated circuit is programmable by virtue of the ability to command selection of a signal path. The signal path is chosen to include or avoid selected “RF functional elements,” i.e., components through which radio frequency signals may be routed. RF functional elements may include, for example, amplifiers, mixers, attenuators, and phase shifters. Aspects of programmability in the integrated circuit include the provision of the functional circuit elements for selectable connection in signal paths, the switching and interconnect technologies used to switch and connect between them, and the arrangement of the functional circuit elements in relationship to each other.Type: ApplicationFiled: February 19, 2010Publication date: September 16, 2010Inventor: David R. Czajkowski
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Publication number: 20100191959Abstract: A method and reconfigurable computer architecture protect binary opcode, or other data and instructions by providing an encryption capability integrated into an instruction issue unit of a protected processor. Opcodes are encrypted at their source, and encrypted opcodes from authorized users are then delivered to a CPU and decrypted “inside” the CPU. Access into the CPU is prevented. Each form of code or data selected for protection is protected from unauthorized viewing or access. Commonly, the binary executable, or object, code is selected for protection. However, protected information could also include source code or data sets or both. Encrypting opcodes will result in making unique opcodes for each processor. Encryption keys and hidden opcode algorithms provide further security.Type: ApplicationFiled: January 7, 2010Publication date: July 29, 2010Inventor: David R. Czajkowski
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Patent number: 7260742Abstract: A non-hardened processor is made fault tolerant to SEUs and SEFIs. A processor is provided utilizing time redundancy to detect and respond to SEUs. Comparison circuitry is provided in a radiation hardened module to provide special redundancy with the need to run additional processors. Additionally, a hardened SEFI circuit is provided to periodically send a signal to the process which, in the case of a processor not in the SEFI state, initiates production by the processor of a “correct” response. If the correct response is not received within a particular time window, the SEFI circuit initiates progressively severe actions until a reset is achieved.Type: GrantFiled: January 28, 2004Date of Patent: August 21, 2007Inventor: David R. Czajkowski
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Patent number: 7148084Abstract: A radiation shielded and packaged integrated circuit semiconductor device includes a lid secured to a base to enclose an integrated circuit die within, wherein the lid and the base are each constructed from a high Z material to prevent radiation from penetrating therethrough. Another embodiment includes a die attach slug constructed from a high Z material disposed between the integrated circuit die and the base, in combination with a high Z material lid to substantially block incident radiation.Type: GrantFiled: April 9, 2004Date of Patent: December 12, 2006Assignee: Maxwell Technologies, Inc.Inventors: David J. Strobel, David R. Czajkowski
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Publication number: 20040251476Abstract: A radiation shielded and packaged integrated circuit semiconductor device includes a lid secured to a base to enclose an integrated circuit die within, wherein the lid and the base are each constructed from a high Z material to prevent radiation from penetrating therethrough. Another embodiment includes a die attach slug constructed from a high Z material disposed between the integrated circuit die and the base, in combination with a high Z material lid to substantially block incident radiation.Type: ApplicationFiled: April 9, 2004Publication date: December 16, 2004Applicant: Maxwell Technologies, Inc.Inventors: David J. Strobel, David R. Czajkowski
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Patent number: 6720493Abstract: A radiation shielded and packaged integrated circuit semiconductor device includes a lid secured to a base to enclose an integrated circuit die within, wherein the lid and the base are each constructed from a high Z material to prevent radiation from penetrating therethrough. Another embodiment includes a die attach slug constructed from a high Z material disposed between the integrated circuit die and the base, in combination with a high Z material lid to substantially block incident radiation.Type: GrantFiled: December 8, 1999Date of Patent: April 13, 2004Assignee: Space Electronics, Inc.Inventors: David J. Strobel, David R. Czajkowski
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Patent number: 5889316Abstract: A new and improved process by which plastic material forming the plastic body package of an integrated circuit is selectively removed and replaced with a radiation shield having a specific formulation that is customized for a given radiation environment dependent upon the space application in which the integrated circuit is to be used.Type: GrantFiled: February 1, 1996Date of Patent: March 30, 1999Assignee: Space Electronics, Inc.Inventors: David J. Strobel, David R. Czajkowski
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Patent number: 5825042Abstract: A new and improved process by which plastic material forming the plastic body package of an integrated circuit is selectively removed and replaced with a radiation shield having a specific formulation that is customized for a given radiation environment dependent upon the space application in which the integrated circuit is to be used.Type: GrantFiled: January 13, 1995Date of Patent: October 20, 1998Assignee: Space Electronics, Inc.Inventors: David J. Strobel, David R. Czajkowski
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Patent number: 5635754Abstract: The radiation shielded and packaged integrated circuit semiconductor device includes a lid secured to a base to enclose the integrated circuit die within, wherein the lid and the base are each constructed from a high-Z material to prevent radiation from penetrating therethrough. Another embodiment includes a die attach slug constructed from a high-Z material disposed between the integrated circuit die and a base, in combination with a high-Z material lid to substantially block incident radiation.Type: GrantFiled: January 13, 1995Date of Patent: June 3, 1997Assignee: Space Electronics, Inc.Inventors: David J. Strobel, David R. Czajkowski
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Patent number: RE42314Abstract: A new method for the detection and correction of environmentally induced functional interrupts (or “hangs”) induced in computers or microprocessors caused by external sources of single event upsets (SEU) which propagate into the internal control functions, or circuits, of the microprocessor. This method is named Hardened Core (or H-Core) and is based upon the addition of an environmentally hardened circuit added into the computer system and connected to the microprocessor to provide monitoring and interrupt or reset to the microprocessor when a functional interrupt occurs. The Hardened Core method can be combined with another method for the detection and correction of single bit errors or faults induced in a computer or microprocessor caused by external sources SEUs.Type: GrantFiled: June 24, 2009Date of Patent: April 26, 2011Assignee: Space Micro, Inc.Inventors: David R. Czajkowski, Darrell Sellers