Abstract: An apparatus for determining the validity of a data signal communicated between two microprocessors by a dual port RAM includes a sender for providing a data signal and an initialization status indicator and a dual port RAM in communication with the sender for receiving the data signal and the initialization status indicator. The RAM has a first location for storing the data signal and a second location for storing the initialization status indicator. The sender performs initialization on the RAM at the beginning of a data transfer cycle which includes a plurality of data transfer from the sender to a receiver. The sender updates the initialization status indicator as the initialization progresses. The receiver reads the initialization status of the RAM from the second location and subsequently reads the data signal from the first location in association with the initialization status of the RAM.

Abstract: An apparatus for determining the validity of a data signal communicated between two microprocessors by a dual port random access memory (RAM). The apparatus includes a sender for providing a data signal and an initialization status indicator, and a dual port RAM in communication with the sender for receiving the data signal and the initialization status indicator. The dual port RAM has a first memory location for storing the data signal and a second memory location for storing the initialization status indicator of the dual port RAM. The sender performs initialization on the dual port RAM at the beginning of a data transfer cycle which includes a plurality of data transfer from the sender to a receiver. The sender updates the initialization status indicator as the initialization progresses. The receiver of the apparatus is in communication with the dual port RAM. More particularly, the receiver reads the initialization status of the dual port RAM from the second memory location.