Patents by Inventor David R. Duval

David R. Duval has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5935229
    Abstract: A programmable direction control scheme for an efficiently wired array of like integrated circuit chips which is capable of producing a rightward or leftward sequence of designated interaction is described. The member chips are incorporated into a system by connecting their existing addressing, data, and clock pads onto a mutual bus. The chips are additionally chained together by their qualification pads so that they may be individually designated for interaction with the system, by way of sequential token passing. A direction control bit within a programmable configuration register is included on each member chip in lieu of a dedicated input. The configuration register is given free access irrespective of the designation status of its incorporating chip, and thus the direction control bits of all of the member chips of the array may be expediently programmed even when the elsewise process of sequencing through the chips would be paradoxically self obstructed by an initial directional chaos condition.
    Type: Grant
    Filed: March 28, 1997
    Date of Patent: August 10, 1999
    Assignee: Xerox Corporation
    Inventors: David R. Duval, Kang Chan
  • Patent number: 5933858
    Abstract: An address line arrangement which uses weighted sets of mutually independent rather than binary address lines to enable the accessing of any number of targeted elements at one time. The elements in a device are divided into groups of elements. For a numerical example, assume four elements per group and eight groups per device. One set of four address lines is wired to access one or all groups in one half of the device and a second set of four lines will access one or all groups in the other half of the device. A third set of four address lines is wired to all elements and will access one, two or all elements in each group at a time. Each element is wired to one line in the first or second group and one line in the second or third group. Since all address lines can be individually turned on, one or more elements can be accessed at one time.
    Type: Grant
    Filed: October 4, 1996
    Date of Patent: August 3, 1999
    Assignee: Xerox Corporation
    Inventor: David R. Duval
  • Patent number: 4709233
    Abstract: A single line pair power control system is disclosed and consists of a reflex module supplying direct current of a first or a second polarity to the control line pair. The polarity of the reflex module reverses in response to a drop in the voltage between the control lines. One or more command modules may be connected between the control lines for short circuiting the two lines to thereby cause polarity reversal of the reflex module. One or more power control relays may be connected to the control lines, such that the relay switch ON for one polarity state of the control lines and are switched off for the opposite polarity of the control lines, thereby controlling power to a load. Also disclosed are an extender module for extending the length of the control lines beyond the length that can be driven by the reflex module, and override circuits for disabling the operation of the command modules, and a special interface which allows control of the reflex module through logic level signals.
    Type: Grant
    Filed: May 27, 1983
    Date of Patent: November 24, 1987
    Inventor: David R. Duval