Patents by Inventor David R. Kee

David R. Kee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6365980
    Abstract: A semiconductor device comprising a thermally conductive foil including a chip mount portion having first and second surfaces; an integrated circuit chip attached to said first surface; a body of encapsulation material molded around said chip and said first surface such that it leaves said second surface exposed; and said second surface comprising means for forming thermal contact, thereby creating a path for dissipating thermal energy from said chip. Said means for thermal contact comprise a configuration of said second surface suitable for direct thermal attachment to a heat sink. Alternatively, said means for thermal contact comprise a configuration of said second surface suitable for thermal attachment including solder balls between the chip and the heat sink.
    Type: Grant
    Filed: February 25, 2000
    Date of Patent: April 2, 2002
    Assignee: Texas Instruments Incorporated
    Inventors: Buford H. Carter, Jr., Dennis D. Davis, David R. Kee, Richard E. Johnson
  • Patent number: 6365976
    Abstract: A semiconductor device, especially a Ball Grid Array or Chip Scale Package, comprising an integrated circuit chip having at least one input/output terminal; a body of encapsulation material molded around said chip, forming a generally flat surface including at least one dimple having a suitable size and shape to receive a solder ball or solder paste; and said dimple having an electrically conductive solderable surface connected to said terminal.
    Type: Grant
    Filed: February 23, 2000
    Date of Patent: April 2, 2002
    Assignee: Texas Instruments Incorporated
    Inventors: Buford H. Carter, Jr., Dennis D. Davis, David R. Kee, Richard E. Johnson
  • Patent number: 6072230
    Abstract: The invention relates to a single piece leadframe that can be used in current semiconductor device production. The leadframe has a plurality of segments in a horizontal plane, a chip mount pad in a different horizontal plane, and another plurality of segments connecting said chip mount pad with said leadframe. The latter plurality of segments has a geometry designed so as to tolerate bending and stretching beyond the limit of simple elongation based upon the inherent material characteristics. The chip mount pad of said leadframe provides direct thermal contact to an external heat conductor or heat sink by being designed so as to extend through the encapsulating package. The exposed chip pad can also be used electrically as a ground connection.
    Type: Grant
    Filed: September 9, 1997
    Date of Patent: June 6, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Buford H. Carter, Jr., Jesse E. Clark, David R. Kee
  • Patent number: 5715989
    Abstract: A method of low temperature securing a wire to a bond pad in a microelectronic semiconductor device which includes providing a semiconductor die having a bond pad thereon and providing a wire to be secured to the bond pad. One of the bond pad and wire is rotated relative to the other and the pad is contacted with the wire while the bond pad and the wire are rotating relative to each other until the interface of the wire and the bond pad diffuse into each other sufficiently to provide a bond therebetween upon cooling to secure the wire to the bond pad. Preferably the die is stationary and the wire is rotated. The wire is then cut to a predetermined length.
    Type: Grant
    Filed: June 4, 1996
    Date of Patent: February 10, 1998
    Assignee: Texas Instruments Incorporated
    Inventor: David R. Kee
  • Patent number: 5594234
    Abstract: The invention is a single piece deep downset exposed lead frame (10) that can be used in current production processes. A single lead frame (10) has a die mount pad (12) that is formed with a downset or cavity into which the semiconductor die (20) is mounted. Wings (14, 15, 17, 18) lock the die pad in the device package (21) and increase the length of potential moisture paths (34a). The downset die pad (12) provides direct thermal contact of the die mount pad (12) to an external heat sink, eliminating the need for a heat slug internal to the package. The exposed die pad (12) can also be used as an RF ground connection to an RF circuit ground plane.
    Type: Grant
    Filed: November 14, 1994
    Date of Patent: January 14, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: Buford H. Carter, Jr., Dennis D. Davis, David R. Kee, Jesse Clark, Steven P. Laverde, Hai Tran
  • Patent number: 5308797
    Abstract: A semiconductor device is formed without using a leadframe. A semiconductor device is formed in one area of a semiconductor chip and a second area includes conductors to which lead wires are bonded. The lead wires are used for mounting the semiconductor device.
    Type: Grant
    Filed: November 24, 1992
    Date of Patent: May 3, 1994
    Assignee: Texas Instruments Incorporated
    Inventor: David R. Kee
  • Patent number: 5070039
    Abstract: A lead from 10 carries an integrated circuit on a die support pad 14. The lead frame has a dam bar including a transverse portion that extends between adjacent leads (20) for limiting mold flash. The dam bar transverse portion 26 is entirely severed from the adjacent leads for final removal by a metal punch 33 along with the supporting web 16.
    Type: Grant
    Filed: April 13, 1989
    Date of Patent: December 3, 1991
    Assignee: Texas Instruments Incorporated
    Inventors: Richard E. Johnson, Dennis D. Davis, David R. Kee, John W. Orcutt, Angus W. Hightower