Abstract: A heat exchanger includes a flat metal tube that has flat top and bottom surfaces and an inner passage. The surfaces remove heat from a liquid passing through the passage from an inlet and toward an outlet of the heat exchanger. A first plurality of solid metal posts are mounted perpendicularly upon the top surface. Each fin of a first plurality of fins has holes fitted about the first plurality of posts such that the fins are mounted on the posts in vertically-spaced, parallel alignment relative to each other and the top surface. A second plurality of solid metal posts are mounted perpendicularly upon the bottom surface. Each fin of a second plurality of fins has holes fitted about the second plurality of posts such that the fins are mounted on the posts in vertically-spaced, parallel alignment relative to each other and the bottom surface.

Abstract: A system includes an integrated circuit and a heatsink mounted thereon. The heatsink includes a flat base plate thermally coupled to a top surface of the integrated circuit, thermally-conductive solid metal posts mounted perpendicularly on the base plate, and flat metal fins. Each of the fins has holes fitted about the posts such that the fins are mounted on the posts in vertically-spaced, parallel alignment relative to each other and the top surface of the base plate. The system further includes a load plate mounted upon top surfaces of the posts, a printed circuit board, and a microprocessor socket mounted on the printed circuit board. The microprocessor socket includes a socket base upon which the integrated circuit is mounted such that the integrated circuit is electrically coupled through the socket base to the printed circuit board. Air may be forced through the heatsink.

Abstract: The chip stack of semiconductor chips with enhanced cooling apparatus includes a first chip with circuitry on a first side and a second chip electrically and mechanically coupled to the first chip by a grid of connectors. The apparatus further includes a thermal interface material pad between the first chip and the second chip, wherein the thermal interface material pad includes nanofibers aligned parallel to mating surfaces of the first chip and the second chip, and a heat removal device thermally connected to the thermal interface material pad.

Abstract: The chip stack of semiconductor chips with enhanced cooling apparatus includes a first chip with circuitry on a first side and a second chip electrically and mechanically coupled to the first chip by a grid of connectors. The apparatus further includes a thermal interface material pad placed between the first chip and the second chip, wherein the thermal interface material pad includes nanofibers aligned parallel to mating surfaces of the first chip and the second chip and nanofibers aligned perpendicular to mating surfaces of the first chip and the second chip.

Abstract: The chip stack of semiconductor chips with enhanced cooling apparatus includes a first chip with circuitry on a first side and a second chip electrically and mechanically coupled to the first chip by a grid of connectors. The apparatus further includes a thermal interface material pad between the first chip and the second chip, wherein the thermal interface material pad includes nanofibers aligned parallel to mating surfaces of the first chip and the second chip, and a heat removal device thermally connected to the thermal interface material pad.

Abstract: The chip stack of semiconductor chips with enhanced cooling apparatus includes a first chip with circuitry on a first side and a second chip electrically and mechanically coupled to the first chip by a grid of connectors.

Abstract: A mechanism is provided for minimizing reliability problems in a three-dimensional (3D) integrated circuit. A set of sensors are interrogated for current data. A direction of force and a magnitude of the force are determined based on the current data for each sensor in the set of sensors for each of one or more directions between the sensor and at least one neighboring sensor thereby forming a set of forces. Each of the set of forces is used to identify one or more points of stress that are at or above the predetermined force threshold. Responsive to identifying at least one point of stress that is at or above the predetermined force threshold, one or more temperature actuation actions are initiated in order to reduce at least one point of stress in the region where the at least one point of stress is identified.

Abstract: The exemplary embodiments of the present invention provide a method and apparatus for enhancing the cooling of a chip stack of semiconductor chips. The method includes creating a first chip with circuitry on a first side and creating a second chip electrically and mechanically coupled to the first chip by a grid of connectors. The method further includes creating a cavity in a second side of the first chip between the connectors and filling the cavity with a thermal material. The chip stack of semiconductor chips with enhanced cooling apparatus includes a first chip with circuitry on a first side and a second chip electrically and mechanically coupled to the first chip by a grid of connectors. The apparatus further includes wherein portions of a second side of the first chip between the connectors is removed to provide a cavity in which a thermal material is placed.

Abstract: The exemplary embodiments of the present invention provide a method and apparatus for enhancing the cooling of a chip stack of semiconductor chips. The method includes creating a first chip with circuitry on a first side and creating a second chip electrically and mechanically coupled to the first chip by a grid of connectors. The method further includes creating a cavity in a second side of the first chip between the connectors and filling the cavity with a thermal material. The chip stack of semiconductor chips with enhanced cooling apparatus includes a first chip with circuitry on a first side and a second chip electrically and mechanically coupled to the first chip by a grid of connectors. The apparatus further includes wherein portions of a second side of the first chip between the connectors is removed to provide a cavity in which a thermal material is placed.

Abstract: A die stack package is provided and includes a substrate, a stack of computing components, at least one thermal plate, which is thermally communicative with the stack and a lid supported on the substrate to surround the stack and the at least one thermal plate to thereby define a first heat transfer path extending from one of the computing components to the lid via the at least one thermal plate and a fin coupled to a surface of the lid and the at least one thermal plate, and a second heat transfer path extending from the one of the computing components to the lid surface without passing through the at least one thermal plate.

Abstract: A mechanism is provided for minimizing reliability problems in a three-dimensional (3D)) integrated circuit. A set of sensors are interrogated for current data. A direction of force and a magnitude of the force are determined based on the current data for each sensor in the set of sensors for each of one or more directions between the sensor and at least one neighboring sensor thereby forming a set of forces. Each of the set of forces is used to identify one or more points of stress that are at or above the predetermined force threshold. Responsive to identifying at least one point of stress that is at or above the predetermined force threshold, one or more temperature actuation actions are initiated in order to reduce at least one point of stress in the region where the at least one point of stress is identified.

Abstract: One embodiment of the present invention provides a computer memory system that includes at least one DIMM connector having a DIMM socket for releasably receiving a terminal edge of a DIMM. A metallic or otherwise highly heat-conductive base is secured to the DIMM connector. A pair of heat spreaders is secured to the base on opposing sides of the DIMM socket. Each heat spreader includes a DIMM-engagement portion spaced from the base. The heat spreaders are nondestructively moveable between an open position spaced apart for receiving the DIMM between the heat spreaders and a closed position for thermally engaging opposing faces of the DIMM. The heat spreaders provide a continuous thermally-conductive pathway between the DIMM-engagement portion and the base. Heatsink fins extend laterally from the base to provide cooling.

Abstract: A die stack package is provided and includes a substrate, a stack of computing components, at least one thermal plate, which is thermally communicative with the stack and a lid supported on the substrate to surround the stack and the at least one thermal plate to thereby define a first heat transfer path extending from one of the computing components to the lid via the at least one thermal plate and a fin coupled to a surface of the lid and the at least one thermal plate, and a second heat transfer path extending from the one of the computing components to the lid surface without passing through the at least one thermal plate.

Abstract: One embodiment of the present invention provides a computer memory system that includes at least one DIMM connector having a DIMM socket for releasably receiving a terminal edge of a DIMM. A metallic or otherwise highly heat-conductive base is secured to the DIMM connector. A pair of heat spreaders is secured to the base on opposing sides of the DIMM socket. Each heat spreader includes a DIMM-engagement portion spaced from the base. The heat spreaders are nondestructively moveable between an open position spaced apart for receiving the DIMM between the heat spreaders and a closed position for thermally engaging opposing faces of the DIMM. The heat spreaders provide a continuous thermally-conductive pathway between the DIMM-engagement portion and the base. Heatsink fins extend laterally from the base to provide cooling.

Abstract: Implementing spread spectrum using digital signal processing techniques. An incoming clock signal is received and sampled using a programmable sampling mechanism to generate a plurality of signal data points included in a sampled signal. The sampled signal is conditioned using a programmable signal conditioning mechanism capable of performing at least one of: reducing a cycle to cycle jitter of the sampled signal; or adjusting the sampled signal to a base frequency. The signal data points are processed and spread across a band of frequencies using a programmable digital signal processor to adjust at least one of: (a) an amplitude, (b) a phase shift, or (c) a frequency shift; for each of a plurality of respective signal data points at a plurality of corresponding frequencies in the band of frequencies. An output waveform is constructed from the processed and spread signal data points, wherein the output waveform constitutes a clock output signal.

Abstract: A side-by-side double row of electronics packages plug into a common backplane. Cooling air flows in an (upside down) omega-shaped path turning into one row of packages, flowing through that row, turning through an air-moving device into a plenum chamber, then turning into the second row of packages, and out of the second row turning again to an outlet.