Abstract: A system and method is disclosed for monitoring the quality of a data link in a 100 Mb Ethernet physical layer device. A link quality monitor detects operational values of data link parameters such as digital equalizer C1 coefficient, digital adaptive gain control, digital base line wander, recovered clock long-term frequency offset, and recovered clock frequency control. When an operational value of a data link parameter exceeds a high or low threshold value, the link quality monitor sends a drop link signal to cause the current data link to be dropped and a new data link established.

Abstract: A system and method for minimizing transmit latency uncertainty in a 100 Mb RMII Ethernet physical layer device is disclosed. A 100 Mb RMII Ethernet transmit physical layer device comprises a divide circuit that selects a phase of a transmit clock signal for transmitting data. The invention comprises a reset circuit that aligns the divide circuit to select an optimal phase of the transmit clock signal for transmitting data. The reset circuit of the invention is capable of reducing the transmit latency uncertainty from approximately twenty nanoseconds to four nanoseconds.