Patents by Inventor David R. Van Loan

David R. Van Loan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6066957
    Abstract: A test fixture for a printed circuit board having a pattern of test probes and a fixed probe plate and a top plate adapted for movement toward and away from the probe plate. The probe plate and the top plate have selected patterns of holes for passage of the test probes through the probe plate and the top plate for contacting test points on the printed circuit board which is supported at one end of the test fixture. A probe retention plate is positioned below the top plate in an area of the test probes to prevent the test probes from walking out of the probe plate. The fixture further includes a spacer plate including interface probes to convert the fixture between a wired and a wireless text fixture.
    Type: Grant
    Filed: March 20, 1998
    Date of Patent: May 23, 2000
    Assignee: Delaware Capital Formation, Inc.
    Inventors: David R. Van Loan, Gary F. St. Onge, Mark A. Swart
  • Patent number: 5798654
    Abstract: A translator fixture for a grid-type test fixture for testing circuit boards. In regions of the circuit board where test point density exceeds the grid spacing of probes in a grid base the test points are reached by a test module that plugs into the translator fixture and includes a grid pattern of feed-through probes for contacting special tilt pins connected to certain test points in the high density region of the board. Additional test probes, located between the rows and columns of feed-through probes, support special tilt pins for translating the remaining test points in the high density region of the board to contacts on flex circuit-type cables sandwiched on the module and extending to the periphery of the fixture for coupling to contacts on the grid base to communicate with test circuits in the test analyzer.
    Type: Grant
    Filed: December 2, 1996
    Date of Patent: August 25, 1998
    Assignee: Everett Charles Technologies, Inc.
    Inventors: David R. Van Loan, Mark A. Swart
  • Patent number: 5633598
    Abstract: A translator fixture for a grid-type test fixture for testing circuit boards. In regions of the circuit board where test point density exceeds the grid spacing of probes in a grid base the test points are reached by a test module that plugs into the translator fixture and includes a grid pattern of feed-through probes for contacting special tilt pins connected to certain test points in the high density region of the board. Additional test probes, located between the rows and columns of feed-through probes, support special tilt pins for translating the remaining test points in the high density region of the board to contacts on flex circuit-type cables sandwiched on the module and extending to the periphery of the fixture for coupling to contacts on the grid base to communicate with test circuits in the test analyzer.
    Type: Grant
    Filed: February 1, 1996
    Date of Patent: May 27, 1997
    Assignee: Everett Charles Technologies, Inc.
    Inventors: David R. Van Loan, Mark A. Swart
  • Patent number: 5444387
    Abstract: Integrated circuit (IC) packages mounted on a loaded printed circuit board (PCB) are tested by a translator module by first placing a corresponding module over each package. Each module has rows of spring contacts for releasably contacting corresponding electrical leads adjacent opposite sides of the IC package. An upper surface of the module has an array of electrically conductive test pads internally connected to corresponding contacts on the module. The test pads match an array of spring probes in the test unit. The module can be a molded plastic housing with metal leaf spring contacts, or it can comprise a composite flex-circuit material with individual contacts comprising flexible spring-like metalized plastic fingers. Contacts on the test module can releasably engage the leads on the IC package directly, or they can contact separate conductive leads on the PCB adjacent the leads on the IC package.
    Type: Grant
    Filed: February 10, 1994
    Date of Patent: August 22, 1995
    Assignee: Everett Charles Technologies, Inc.
    Inventors: David R. Van Loan, Charles J. Johnston, Mark A. Swart
  • Patent number: 5408189
    Abstract: A test fixture for testing circuit boards includes an array of test probes mounted to a probe plate and held in contact with test points in circuits printed on the board. The circuit array is indexed with respect to a fiducial mark on the board. The fiducial mark is sensed, and an optical reading shows the alignment or misalignment of the test points on the board relative to the probes. The top plate position is adjusted to move the board relative to the probes to correct misalignment. The optical reading indicates movement of the board to a corrected position necessary to align the test points to the probes. Board alignment can be optically sensed by a bore scope and an image enlarger and video probe that produce images of the fiducial mark and a known zero reference point on a video monitor. The zero reference is adjustable electronically during calibration.
    Type: Grant
    Filed: December 14, 1992
    Date of Patent: April 18, 1995
    Assignee: Everett Charles Technologies, Inc.
    Inventors: Mark A. Swart, Charles J. Johnston, David R. Van Loan
  • Patent number: 5321351
    Abstract: A test fixture for testing printed circuit boards includes an array of test probes held in contact with a pattern of test points in a circuit array printed on the circuit board. The circuit array is positioned on the board with respect to a fiducial mark on the board, and a tooling pin hole on the board is aligned with the circuit array. The fixture includes a tooling pin inserted in the tooling pin hole to hold the circuit array in a fixed position relative to the test probes during testing. The fiducial mark is sensed, and an optical reading shows the alignment or misalignment of the test points on the board relative to the probes. The tooling pin is adjusted on the fixture to move the board relative to the probes to correct misalignment. The optical reading indicates movement of the tooling pin and board to a corrected position necessary to align the circuits on the board to the probe field.
    Type: Grant
    Filed: January 31, 1991
    Date of Patent: June 14, 1994
    Assignee: Everett Charles Technologies, Inc.
    Inventors: Mark A. Swart, Charles J. Johnston, David R. Van Loan
  • Patent number: 5289117
    Abstract: Integrated circuit (IC) packages mounted on a loaded printed circuit board (PCB) are tested by a translator module by first placing a corresponding module over each package. Each module has rows of spring contacts for releasably contacting corresponding electrical leads adjacent opposite sides of the IC package. An upper surface of the module has an array of electrically conductive test pads internally connected to corresponding contacts on the module. The test pads match an array of spring probes in the test unit. The module can be a molded plastic housing with metal leaf spring contacts, or it can comprise a composite flex-circuit material with individual contacts comprising flexible spring-like metalized plastic fingers. Contacts on the test module can releasably engage the leads on the IC package directly, or they can contact separate conductive leads on the PCB adjacent the leads on the IC package.
    Type: Grant
    Filed: December 30, 1992
    Date of Patent: February 22, 1994
    Assignee: Everett Charles Technologies, Inc.
    Inventors: David R. Van Loan, Charles J. Johnston, Mark A. Swart
  • Patent number: 5270641
    Abstract: A dual side access test fixture tests circuits on both sides of a printed circuit board. The fixture includes a housing, a lower probe plate in the housing, an array of lower test probes in the lower probe plate for contacting the bottom of the board, an upper probe plate on the housing for moving to a closed position above the board, and an array of upper test probes in the upper probe plate for contacting an upper surface of the board when the upper probe plate closed. A plurality of system interface pins in the housing are electrically connected to the lower test probes. An external upper interface connector mounted over the closed upper probe plate has a plurality of contacts for connection to corresponding upper test probes. Flex cables contained within the upper interface connector conduct test signals from the upper test probes directly to an external electronic circuit tester. A first set of test signals is communicated from the lower test probes through the interface pins to the circuit tester.
    Type: Grant
    Filed: January 22, 1992
    Date of Patent: December 14, 1993
    Assignee: Everett Charles Technologies, Inc.
    Inventors: David R. Van Loan, Charles J. Johnston, Mark A. Swart, David J. Wilkie
  • Patent number: 5247246
    Abstract: Integrated circuit (IC) packages mounted on a loaded printed circuit board (PCB) are tested by a translator module by first placing a corresponding module over each package. Each module has rows of spring contacts for releasably contacting corresponding electrical leads adjacent opposite sides of the IC package. An upper surface of the module has an array of electrically conductive test pads internally connected to corresponding contacts on the module. The test pads match an array of spring probes in the test unit. The module can be a molded plastic housing with metal leaf spring contacts, or it includes a composite flex-circuit material with individual contacts including flexible spring-like metalized plastic fingers. Contacts on the test module can releasably engage the leads on the IC package directly, or they contact separate conductive leads on the PCB adjacent the leads on the IC package.
    Type: Grant
    Filed: May 10, 1991
    Date of Patent: September 21, 1993
    Assignee: Everett Charles Technologies, Inc.
    Inventors: David R. Van Loan, Charles J. Johnston, Mark A. Swart
  • Patent number: 5180976
    Abstract: Integrated circuit (IC) packages mounted on a loaded printed circuit board (PCB) are tested by a translator module by first placing a corresponding module over each package. Each module has rows of spring contacts for releasably contacting corresponding electrical leads adjacent opposite sides of the IC package. An upper surface of the module has an array of electrically conductive test pads internally connected to corresponding contacts on the module. The test pads match an array of spring probes in the test unit. The module can be a molded plastic housing with metal leaf spring contacts, or it can comprise a composite flex-circuit material with individual contacts comprising flexible spring-like metalized plastic fingers. Contacts on the test module can releasably engage the leads on the IC package directly, or they can contact separate conductive leads on the PCB adjacent the leads on the IC package.
    Type: Grant
    Filed: September 9, 1991
    Date of Patent: January 19, 1993
    Assignee: Everett/Charles Contact Products, Inc.
    Inventors: David R. Van Loan, Charles J. Johnston, Mark A. Swart
  • Patent number: 5049813
    Abstract: Integrated circuit (IC) packages mounted on a loaded printed circuit board (PCB) are tested by a translator module by first placing a corresponding module over each package. Each module has rows of spring contacts for releasably contacting corresponding electrical leads adjacent opposite sides of the IC package. An upper surface of the module has an array of electrically conductive test pads internally connected to corresponding contacts on the module. The test pads match an array of spring probes in the test unit. The module can be a molded plastic housing with metal leaf spring contacts, or it can comprise a composite flex-circuit material with individual contacts comprising flexible spring-like metalized plastic fingers. Contacts on the test module can releasably engage the leads on the IC package directly, or they can contact separate conductive leads on the PCB adjacent the leads on the IC package.
    Type: Grant
    Filed: October 25, 1989
    Date of Patent: September 17, 1991
    Assignee: Everett/Charles Contact Products, Inc.
    Inventors: David R. Van Loan, Charles J. Johnston, Mark A. Swart