Abstract: An apparatus includes a substrate, a core, a primary side circuit, first and second secondary side circuits, a primary winding, and first and second secondary windings. The substrate includes first, second, and third metal layers. The core is in the substrate. The primary side circuit, and the first and second secondary side circuits are on the substrate. The primary winding is in the first metal layer of the substrate. The primary winding wraps around the core and is coupled to the primary side circuit. The first secondary winding is in the second metal layer of the substrate. The first secondary winding wraps around the core and is coupled to the first secondary side circuit. The second secondary winding is in the third metal layer of the substrate. The second secondary winding wraps around the core and is coupled to the second secondary side circuit.

Abstract: A radius filler includes a plurality of fibers encapsulated in resin and braided into a braided radius filler. The braided radius filler has a substantially triangular shape with concave radius filler side surfaces and a substantially planar radius filler base surface.

Abstract: A radius filler includes a plurality of fibers encapsulated in resin and braided into a braided radius filler. The braided radius filler has a substantially triangular shape with concave radius filler side surfaces and a substantially planar radius filler base surface.

Abstract: A method of manufacturing a radius filler may include providing a plurality of fibers, braiding the plurality of fibers into a braided preform, shaping the braided preform into a braided radius filler, and cutting the braided radius filler to a desired length.

Abstract: A highly efficient, single sided circuit board layout design providing magnetic field self-cancellation and reduced parasitic inductance independent of board thickness. The low profile power loop extends through active and passive devices on the top layer of the circuit board, with vias connecting the power loop to a return path in an inner layer of the board. The magnetic effect of the portion of the power loop on the top layer is reduced by locating the inner layer return path directly underneath the power loop path on the top layer.

Abstract: A highly efficient, single sided circuit board layout design providing magnetic field self-cancellation and reduced parasitic inductance independent of board thickness. The low profile power loop extends through active and passive devices on the top layer of the circuit board, with vias connecting the power loop to a return path in an inner layer of the board. The magnetic effect of the portion of the power loop on the top layer is reduced by locating the inner layer return path directly underneath the power loop path on the top layer.