Patents by Inventor David Reynier

David Reynier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • METHOD AND SYSTEM FOR EMULATING A DESIGN UNDER TEST ASSOCIATED WITH A TEST ENVIRONMENT
    Publication number: 20100161306
    Abstract: The method of emulating the design under test associated with a test environment comprises two distinct generating phases comprising a first phase of generating (80) a first file (FCH1) for configuring the test environment, and a second phase of generating (81) a second file (FCH2) for configuring at least a part of the design under test, the delivery of the first configuration file to a first reconfigurable hardware part (BTR) forming a reconfigurable test bench so as to configure the test bench, and the delivery of the second configuration file to a second reconfigurable hardware part (EML) so as to configure an emulator of the design under test, the two hardware parts being distinct and mutually connected.
    Type: Application
    Filed: July 22, 2009
    Publication date: June 24, 2010
    Applicant: EMULATION AND VERIFICATION ENGINEERING
    Inventors: LUC BURGUN, DAVID REYNIER, Sébastien Delerse, Frédéric Emirian, FRANCOIS DOUËZY
  • Method and system for emulating a design under test associated with a test environment
    Publication number: 20040111252
    Abstract: The method of emulating the design under test associated with a test environment comprises two distinct generating phases comprising a first phase of generating (80) a first file (FCH1) for configuring the test environment, and a second phase of generating (81) a second file (FCH2) for configuring at least a part of the design under test, the delivery of the first configuration file to a first reconfigurable hardware part (BTR) forming a reconfigurable test bench so as to configure the test bench, and the delivery of the second configuration file to a second reconfigurable hardware part (EML) so as to configure an emulator of the design under test, the two hardware parts being distinct and mutually connected.
    Type: Application
    Filed: June 26, 2003
    Publication date: June 10, 2004
    Applicant: EMULATION AND VERIFICATION ENGINEERING
    Inventors: Luc Burgun, David Reynier, Sebastien Delerse, Frederic Emirian, Francois Douezy