Abstract: Described herein are systems and methods for scalable communications. A circuit can receive a request from an application to communicate with a destination over a network. The circuit can identify the destination from information included in the request. In a first case that resources have been allocated for communicating with the destination identified from the request, the circuit can communicate data to the destination over the network using the resources that have been allocated. In a second case that resources have not been allocated for communicating with the destination identified from the request, the circuit can allocate resources for communicating the data with the destination. The circuit can communicate the data to the destination over the network using the resources that have been allocated.

Abstract: A computer-implemented method for task management can include managing performance of a task on a message by a plurality of circuits. In some aspects, the task can comprise a sequence of processings to be performed on the message and each circuit of the plurality of circuits performing a processing of the sequence of processings. In some aspects, the method can include routing, based on the sequence, a first information regarding the task to a first circuit of the plurality of circuits to perform a first processing of the sequence of processings on the message; receiving, from the first circuit, an output of the first processing; and routing, based on the sequence of processings identified for the task, a second information regarding the task to a second circuit of the plurality of circuits to perform a second processing that follows the first processing in the sequence of processings.

Abstract: Described herein are systems and methods for managing error detection in a message. A circuit can identify, based on an error detection configuration of the at least one circuit, a first portion of the message to be checked for errors before a second portion of the message is available to the at least one circuit, the first portion being less than all of the message to be checked for one or more errors. A circuit can analyze a number of bits of the first portion of the message using the at least one circuit and based on the error detection configuration. A circuit can, based on analyzing the first portion, determine whether the message includes the one or more errors. Various other methods, systems, and computer-readable media are also disclosed.

Abstract: A computer-implemented method for memory management can include identifying a set of one or more memory blocks of virtual memory to be allocated for storage of a content into a plurality of memory banks that subdivide physical memory. The method can include storing the content in the set of one or more memory blocks of virtual memory. The method can include assigning an identifier to the set of one or more memory blocks of virtual memory that store the content. The method can include outputting the identifier for the set of one or more memory blocks of virtual memory. Various other methods, systems, and computer-readable media are also disclosed.

Abstract: A computer-implemented method for managing processing order for a plurality of commands can include in response to receiving each command of a plurality of commands in a receipt order, assigning each respective command of the plurality of commands to a respective processing queue of a plurality of processing queues to be processed, and setting, for each of the plurality of commands and in the receipt order, an identifier based on the respective queue assigned to each of the plurality of commands, and managing, based on the identifiers for each of the plurality of commands in the receipt order, an order of processing of each of the plurality of commands from the respective processing queue of the plurality of processing queues. Various other methods, systems, and computer-readable media are also disclosed.

Abstract: A computer-implemented method for managing channel accessibility can include detecting, by a first circuit, a transmit request from the first circuit to transmit a message into a communication channel connecting the first circuit to second circuit. The method can include determining, by the first circuit, whether to approve the transmit request based on an evaluation of a first number associated with messages previously transmitted by the first circuit to the second circuit over the communication channel and a second number associated with processing by the second circuit of the messages previously transmitted by the first circuit. The method can include, in response to determining to approve the transmit request, transmitting, by the first circuit, the message into the communication channel. Various other methods, systems, and computer-readable media are also disclosed.

Abstract: A method for controlling the processing of data in a data processor such that the data processor is connectable to a further device over a data link. The method comprising the steps of receiving data at an element of the data processor and if a set interval has elapsed following the receipt of the data, determining whether processing of the received data in accordance with a data transfer protocol has begun, and, if it has not, triggering such processing of the received data by a protocol processing element. The method then senses conditions pertaining to the data link and sets the interval in dependence on the sensed conditions.

Abstract: A network interface device for connection between a network and a data processing system, the network interface device comprising: a plurality of ports for receiving data packets directed to the data processing system. An interface services the ports in a predetermined order and writes the data packets to buffers of a common memory. Each buffer is part of one of a set of linked logical sequence of buffers forming virtual queues in the common memory. Each virtual queue is associated with a port. A memory manager selects buffers of the common memory so as to cause the interface to populate the plurality of virtual queues with data packets.

Abstract: A method and data processing system are provided. The data processing system comprises an application associated with a plurality of sockets and a sub-system for making data available to the application via the plurality of sockets. The sub-system is configured to provide in response to a request from the application: an indication of events that have occurred on one or more of the plurality of sockets; and an indication of an order in which the events should be processed.

Abstract: A method for controlling the processing of data in a data processor such that the data processor is connectable to a further device over a data link. The method comprising the steps of receiving data at an element of the data processor and if a set interval has elapsed following the receipt of the data, determining whether processing of the received data in accordance with a data transfer protocol has begun, and, if it has not, triggering such processing of the received data by a protocol processing element. The method then senses conditions pertaining to the data link and sets the interval in dependence on the sensed conditions.

Abstract: A method for controlling the processing of data in a data processor such that the data processor is connectable to a further device over a data link. The method comprising the steps of receiving data at an element of the data processor and if a set interval has elapsed following the receipt of the data, determining whether processing of the received data in accordance with a data transfer protocol has begun, and, if it has not, triggering such processing of the received data by a protocol processing element. The method then senses conditions pertaining to the data link and sets the interval in dependence on the sensed conditions.

Abstract: A data processing system supporting a network interface device and comprising: a plurality of sets of one or more data processing cores; and an operating system arranged to support at least one socket operable to accept data received from the network, the data belonging to one of a plurality of data flows; wherein the socket is configured to provide an instance of at least some of the state associated with the data flows per said set of data processing cores.

Abstract: Roughly described, a data processing system comprises a central processing unit and a split network interface functionality, the split network interface functionality comprising: a first sub-unit collocated with the central processing unit and configured to at least partially form a series of network data packets for transmission to a network endpoint by generating data link layer information for each of those packets; and a second sub-unit external to the central processing unit and coupled to the central processing unit via an interconnect, the second sub-unit being configured to physically signal the series of network data packets over a network.

Abstract: A network interface device providing a set of functions in hardware and being operable in first and second modes: in a first mode, the network interface device being configured to operate with a selected configuration of the set of functions; and in a second mode, the network interface device being operable to select a particular configuration of the set of functions in accordance with configuration instructions received at the network interface device; the network interface device being configured to, on receiving a network message having one or more predetermined characteristics and comprising an authentication key and one or more configuration instructions defining a particular configuration of the set of functions: verify the authentication key; and if the authentication key is successfully verified, select the particular configuration of the set of functions defined in the configuration instructions of the network message.

Abstract: A method and data processing system are provided. The data processing system comprises an application associated with a plurality of sockets and a sub-system for making data available to the application via the plurality of sockets. The sub-system is configured to provide in response to a request from the application: an indication of events that have occurred on one or more of the plurality of sockets; and an indication of an order in which the events should be processed.

Abstract: Roughly described, a header processing engine for a network interface device has a header recognizer to parse the headers of a data packet stored at a buffer to identify the type and position of each header in the packet; a constructor unit; and a processor including an execution pipeline. The header recognizer is configured to, for each header: select in dependence on the header type commands stored at a command memory; and form one or more messages for the constructor unit identifying the selected commands and the position of the header in the data packet. The commands selected for the packet headers are collectively such as to, if executed by the constructor unit, cause the constructor unit to generate a data structure which operates to cause the processor to process of the packet headers without accessing the data packet at the buffer.

Abstract: A network interface device for connection between a network and a data processing system, the network interface device comprising: an I/O interface for connection to a data processing system; a set of physical data ports for connection to a network; a unified memory comprising a plurality of buffers; a plurality of ingress ports operable to receive data packets for buffering at the unified memory, a first subset of the plurality of ingress ports being configured to receive data packets on a transmit path from said I/O interface, and a second subset of the plurality of ingress ports being configured to receive data packets on a receive path from said set of physical data ports; a memory manager configured to store representations of a plurality of virtual queues held in the unified memory, each virtual queue being a linked logical sequence of buffers of the unified memory; and an ingress interface configured to service the ingress ports in a predetermined order and write data packets received at the ingress po

Abstract: A method of transmitting data according to a data transmission protocol wherein the data is transmitted as a plurality of data frames and each data frame includes an error checking field comprising at least two sub-fields, the data of the first sub-field being formed by a first error checking method performed on data of the frame and the data of the second sub-field being formed by a second error checking method performed on the said data of the frame, the first and second methods being such that the data of the first sub-field has different error checking properties from those of the data of the second sub-field.

Abstract: A network interface device for connection between a network and a data processing system, the network interface device comprising: an I/O interface for connection to a data processing system; a set of physical data ports for connection to a network; a unified memory comprising a plurality of buffers; a plurality of ingress ports operable to receive data packets for buffering at the unified memory, a first subset of the plurality of ingress ports being configured to receive data packets on a transmit path from said I/O interface, and a second subset of the plurality of ingress ports being configured to receive data packets on a receive path from said set of physical data ports; a memory manager configured to store representations of a plurality of virtual queues held in the unified memory, each virtual queue being a linked logical sequence of buffers of the unified memory; and an ingress interface configured to service the ingress ports in a predetermined order and write data packets received at the ingress po

Abstract: Roughly described, a header processing engine for a network interface device has a header recognizer to parse the headers of a data packet stored at a buffer to identify the type and position of each header in the packet; a constructor unit; and a processor including an execution pipeline. The header recognizer is configured to, for each header: select in dependence on the header type commands stored at a command memory; and form one or more messages for the constructor unit identifying the selected commands and the position of the header in the data packet. The commands selected for the packet headers are collectively such as to, if executed by the constructor unit, cause the constructor unit to generate a data structure which operates to cause the processor to process of the packet headers without accessing the data packet at the buffer.