Patents by Inventor David S. Ebsen
David S. Ebsen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240118971Abstract: Methods, systems, and apparatuses include allocating a temporary parity buffer to a parity group. A write command is received that includes user data and is directed to a portion of memory included in a zone which is included in the parity group. A memory identifier is determined for the portion of memory. Parity group data is received from the temporary parity buffer using the memory identifier. Updated parity group data is determined using the parity group data and the user data. The updated parity group data is sent to the temporary parity buffer.Type: ApplicationFiled: October 9, 2023Publication date: April 11, 2024Inventors: Kishore Kumar Muchherla, David Scott Ebsen, Akira Goda, Jonathan S. Parry, Vivek Shivhare, Suresh Rajgopal
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Patent number: 11449431Abstract: A data storage device may consist of a non-volatile memory having rewritable in-place memory cells each with a read-write asymmetry. The non-volatile memory can store boot data that is subsequently loaded by a selection module of the data storage device. The selection module may bypass a memory buffer of the data storage device to load the boot data.Type: GrantFiled: May 30, 2017Date of Patent: September 20, 2022Inventors: Mark Ish, Timothy Canepa, David S. Ebsen
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Patent number: 11216345Abstract: Systems and methods for limiting performance variation in a storage device are described. Storage devices receive work requests to perform one or more operations from other computing devices, such as a host computing device. Completing the work requests may take a response time. In some embodiments, if the response time of executing the work request exceeds a threshold, the storage device may assign additional computing resources to complete the work request.Type: GrantFiled: September 4, 2019Date of Patent: January 4, 2022Assignee: Seagate Technology LLCInventors: David S. Ebsen, Kevin A. Gomez, Mark Ish, Daniel J. Benjamin
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Patent number: 10558380Abstract: Systems and methods for active power management are described. In one embodiment, the systems and methods include obtaining power dissipation metrics for a plurality of components under one or more operating scenarios, generating a reference dissipation model based on the power dissipation metrics of the plurality of components, and implementing the reference dissipation model in a storage system to make component scheduling decisions in relation to power management of the storage system. In some embodiments, the storage system includes any combination of a hard disk drive, a solid state drive, a hybrid drive, and a system of multiple storage drives.Type: GrantFiled: August 9, 2016Date of Patent: February 11, 2020Assignee: Seagate Technology LLCInventors: David S. Ebsen, Kevin A. Gomez, Mark Ish, Daniel J. Benjamin
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Patent number: 10559376Abstract: A data storage device can have at least a buffer memory, a selection module, and a non-volatile memory. The buffer memory and non-volatile memory may consist of different types of memory while the non-volatile memory has one or more rewritable in-place memory cells. The buffer memory and non-volatile memory may each store data associated with a pending data request as directed by the selection module until a settle time of the rewritable in-place memory cell has expired.Type: GrantFiled: October 1, 2018Date of Patent: February 11, 2020Assignee: Seagate Technology LLCInventors: Timothy Canepa, Mark Ish, David S. Ebsen
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Patent number: 10558398Abstract: Systems and methods for reducing read latency by storing a redundant copy of data are described. In one embodiment, the systems and methods include identifying data assigned to be written to a page of a storage device, storing the data in a page of a first die of the storage device, and saving at least one codeword from the data to a page of a second die. In some embodiments, the first die is associated with a first channel of the storage device and the second die is associated with a second channel of the storage device.Type: GrantFiled: July 29, 2016Date of Patent: February 11, 2020Assignee: Seagate Technology LLCInventors: Kevin A. Gomez, Mark Ish, David S. Ebsen, Daniel J. Benjamin
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Publication number: 20190391886Abstract: Systems and methods for limiting performance variation in a storage device are described. Storage devices receive work requests to perform one or more operations from other computing devices, such as a host computing device. Completing the work requests may take a response time. In some embodiments, if the response time of executing the work request exceeds a threshold, the storage device may assign additional computing resources to complete the work request.Type: ApplicationFiled: September 4, 2019Publication date: December 26, 2019Inventors: David S. Ebsen, Kevin A. Gomez, Mark Ish, Daniel J. Benjamin
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Patent number: 10423500Abstract: Systems and methods for limiting performance variation in a storage device are described. Storage devices receive work requests to perform one or more operations from other computing devices, such as a host computing device. Completing the work requests may take a response time. In some embodiments, if the response time of executing the work request exceeds a threshold, the storage device may assign additional computing resources to complete the work request.Type: GrantFiled: June 1, 2016Date of Patent: September 24, 2019Assignee: SEAGATE TECHNOLOGY LLCInventors: David S. Ebsen, Kevin A. Gomez, Mark Ish, Daniel J. Benjamin
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Publication number: 20190096506Abstract: A data storage device can have at least a buffer memory, a selection module, and a non-volatile memory. The buffer memory and non-volatile memory may consist of different types of memory while the non-volatile memory has one or more rewritable in-place memory cells. The buffer memory and non-volatile memory may each store data associated with a pending data request as directed by the selection module until a settle time of the rewritable in-place memory cell has expired.Type: ApplicationFiled: October 1, 2018Publication date: March 28, 2019Inventors: Timothy Canepa, Mark Ish, David S. Ebsen
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Publication number: 20180349148Abstract: A data storage device may consist of a non-volatile memory having rewritable in-place memory cells each with a read-write asymmetry. The non-volatile memory can store boot data that is subsequently loaded by a selection module of the data storage device. The selection module may bypass a memory buffer of the data storage device to load the boot data.Type: ApplicationFiled: May 30, 2017Publication date: December 6, 2018Inventors: Mark Ish, Timothy Canepa, David S. Ebsen
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Publication number: 20180350447Abstract: A data storage device may consist of a non-volatile memory connected to a selection module. The non-volatile memory can have a rewritable in-place memory cell that has a read-write asymmetry. The selection module can dedicate a portion of the non-volatile memory to a data map that can be self-contained along with reactively and proactively altered by the selection module.Type: ApplicationFiled: May 30, 2017Publication date: December 6, 2018Inventors: David S. Ebsen, Mark Ish, Timothy Canepa
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Patent number: 10147501Abstract: A data storage device may consist of a non-volatile memory connected to a selection module. The non-volatile memory can have a rewritable in-place memory cell that has a read-write asymmetry. The selection module can dedicate a portion of the non-volatile memory to a data map that can be self-contained along with reactively and proactively altered by the selection module.Type: GrantFiled: May 30, 2017Date of Patent: December 4, 2018Assignee: Seagate Technology LLCInventors: David S. Ebsen, Mark Ish, Timothy Canepa
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Patent number: 10090067Abstract: A data storage device can have at least a buffer memory, a selection module, and a non-volatile memory. The buffer memory and non-volatile memory may consist of different types of memory while the non-volatile memory has one or more rewritable in-place memory cells. The buffer memory and non-volatile memory may each store data associated with a pending data request as directed by the selection module until a settle time of the rewritable in-place memory cell has expired.Type: GrantFiled: May 30, 2017Date of Patent: October 2, 2018Assignee: Seagate Technology LLCInventors: Timothy Canepa, Mark Ish, David S. Ebsen
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Patent number: 10068663Abstract: A non-volatile memory may be resident in a data storage device. The non-volatile memory can consist of a rewritable in-place memory cell having a read-write asymmetry. The non-volatile memory may be divided into a first group of tiers with a selection module of the data storage device prior to adapting to an event by altering the non-volatile memory into a second group of tiers. The first and second groups of tiers being different.Type: GrantFiled: May 30, 2017Date of Patent: September 4, 2018Assignee: Seagate Technology LLCInventors: David S. Ebsen, Mark Ish, Timothy Canepa
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Patent number: 10049040Abstract: The disclosure is related to systems and methods of managing a memory. In a particular embodiment, a memory is disclosed that includes multiple garbage collection units. The memory also includes a controller that determines whether to select a garbage collection unit of the multiple garbage collection units for garbage collection based on a variable threshold number of the multiple garbage collection units to garbage collect.Type: GrantFiled: January 21, 2011Date of Patent: August 14, 2018Assignee: SEAGATE TECHNOLOGY LLCInventors: David S. Ebsen, Ryan J. Goss
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Patent number: 9910606Abstract: Method and apparatus for managing a solid state memory, such as but not limited to a NAND flash memory. In some embodiments, a storage device includes a non-volatile solid state memory and a control circuit configured to transfer user data between the memory and a host device. The control circuit maintains, in a local memory, a data structure indicative of measured readback error rates associated with memory locations in the memory in relation to erasure counts associated with the memory locations. The control circuit retires a subset of the memory locations identified by the data structure from further availability to store user data from the host device responsive to the measured readback error rates, and responsive to the erasure counts of said memory locations indicating the memory has reached an end of life (EOL) condition.Type: GrantFiled: March 23, 2016Date of Patent: March 6, 2018Assignee: Seagate Technology LLCInventors: Antoine Khoueir, Ara Patapoutian, David S. Ebsen, Ryan J. Goss
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Publication number: 20180046408Abstract: Systems and methods for active power management are described. In one embodiment, the systems and methods include obtaining power dissipation metrics for a plurality of components under one or more operating scenarios, generating a reference dissipation model based on the power dissipation metrics of the plurality of components, and implementing the reference dissipation model in a storage system to make component scheduling decisions in relation to power management of the storage system. In some embodiments, the storage system includes any combination of a hard disk drive, a solid state drive, a hybrid drive, and a system of multiple storage drives.Type: ApplicationFiled: August 9, 2016Publication date: February 15, 2018Applicant: SEAGATE TECHNOLOGY LLCInventors: David S. Ebsen, Kevin A. Gomez, Mark Ish, Daniel J. Benjamin
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Publication number: 20180032264Abstract: Systems and methods for reducing read latency by storing a redundant copy of data are described. In one embodiment, the systems and methods include identifying data assigned to be written to a page of a storage device, storing the data in a page of a first die of the storage device, and saving at least one codeword from the data to a page of a second die. In some embodiments, the first die is associated with a first channel of the storage device and the second die is associated with a second channel of the storage device.Type: ApplicationFiled: July 29, 2016Publication date: February 1, 2018Applicant: SEAGATE TECHNOLOGY LLCInventors: Kevin A. Gomez, Mark Ish, David S. Ebsen, Daniel J. Benjamin
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Publication number: 20170351582Abstract: Systems and methods for limiting performance variation in a storage device are described. Storage devices receive work requests to perform one or more operations from other computing devices, such as a host computing device. Completing the work requests may take a response time. In some embodiments, if the response time of executing the work request exceeds a threshold, the storage device may assign additional computing resources to complete the work request.Type: ApplicationFiled: June 1, 2016Publication date: December 7, 2017Applicant: SEAGATE TECHNOLOGY LLCInventors: DAVID S. EBSEN, KEVIN A. GOMEZ, MARK ISH, DANIEL J. BENJAMIN
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Publication number: 20170277448Abstract: Method and apparatus for managing a solid state memory, such as but not limited to a NAND flash memory. In some embodiments, a storage device includes a non-volatile solid state memory and a control circuit configured to transfer user data between the memory and a host device. The control circuit maintains, in a local memory, a data structure indicative of measured readback error rates associated with memory locations in the memory in relation to erasure counts associated with the memory locations. The control circuit retires a subset of the memory locations identified by the data structure from further availability to store user data from the host device responsive to the measured readback error rates, and responsive to the erasure counts of said memory locations indicating the memory has reached an end of life (EOL) condition.Type: ApplicationFiled: March 23, 2016Publication date: September 28, 2017Inventors: Antoine Khoueir, Ara Patapoutian, David S. Ebsen, Ryan J. Goss