Abstract: A precompensation write circuit includes a ring oscillator (100), a pluse interpolator circuit 200, a data pattern sequence detector circuit 300, a precoder circuit 400, a data reference reframe circuit 500, a data coalscer circuit 600 and an isolation mux circuit 700.

Abstract: A method and apparatus for providing ECL output signals to a capacitative load includes differential amplification of input signals with a first output of a differential amplifier connected for establishing a voltage level between voltage limits V.sub.cc and V.sub.ee at the output of an output driver in response to variations in the first amplifier output. A pull-down transistor has a collector connected to the output driver output, an emitter connected to the V.sub.ee voltage source, and a base coupled through a boost capacitor to the second amplifier output. A voltage clamp embracing a clamp transistor with a base connected to receive a predetermined control voltage has an emitter connected to the boost capacitor and the pull-down transistor base and a collector connected to the V.sub.cc voltage source. The clamp transistor is operated in Darlington configuration to provide a minimum discharge impedence to the base of the pull-down transistor.

Abstract: A method and apparatus for providing ECL output signals to a capacitative load includes differential amplification of input signals with a first output of a differential amplifier connected for establishing a voltage level between voltage limits V.sub.cc and V.sub.ee at the output of an output driver in response to variations in the first amplifier output. A pull-down transistor has a collector connected to the output driver output, an emitter connected to the V.sub.ee voltage source, and a base coupled through a boost capacitor to the second amplifier output. A voltage clamp embracing a clamp transistor with a base connected to receive a predetermined control voltage has an emitter connected to the boost capacitor and the pull-down transistor base and a collector connected to the V.sub.cc voltage source. The clamp transistor is operated in Darlington configuration to provide a minimum discharge impedence to the base of the pull-down transistor.

Abstract: A method and apparatus for converting input signals at one predetermined logic level to output signals at corresponding different logic levels includes differential amplification of input signals with a first output of a differential amplifier connected for establishing a voltage level between voltage limits V.sub.cc and V.sub.ee at the output of an output driver in response to variations in amplifier output. A pull-down transistor has a collector connected to the output driver output, an emitter connected to the V.sub.ee voltage source, and a base capacitively coupled to the second amplifier output. In further aspects of the invention, a voltage clamp embracing a transistor with a base connected to receive a predetermined control voltage has an emitter connected to the pull-down transistor base and a collector connected to the V.sub.cc voltage source.