Patents by Inventor David Scheid
David Scheid has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9808831Abstract: The Automatic Shaker Screen Cleaner of this invention enables the efficient cleaning of the large shaker screens that are often used in petroleum extraction and mining operations. This Automatic Shaker Screen Cleaner includes a pump system to deliver water or solvent fluid to clean the shaker screens; a motor system to move the cleaning apparatus back and forth to facilitate the cleaning of the shaker screens; a pressurized air system to clean the hoses when the device is not in use, as well as the electronic controls and power connections required to safely operate the Cleaner.Type: GrantFiled: November 5, 2013Date of Patent: November 7, 2017Assignee: KAMAKO MANUFACTURING, LLCInventor: David Scheid
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Publication number: 20150122296Abstract: The Automatic Shaker Screen Cleaner of this invention enables the efficient cleaning of the large shaker screens that are often used in petroleum extraction and mining operations. This Automatic Shaker Screen Cleaner includes a pump system to deliver water or solvent fluid to clean the shaker screens; a motor system to move the cleaning apparatus back and forth to facilitate the cleaning of the shaker screens; a pressurized air system to clean the hoses when the device is not in use, as well as the electronic controls and power connections required to safely operate the Cleaner.Type: ApplicationFiled: November 5, 2013Publication date: May 7, 2015Applicant: KAMAKO MANUFACTURING, LLCInventor: DAVID SCHEID
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Patent number: 8907482Abstract: A system may include a package defining a cavity and an integrated circuit (IC) disposed within the cavity. The package may include a first electrically conductive package contact and a second electrically conductive package contact. The IC may include a first electrically conductive IC contact and a second electrically conductive IC contact. The system also may include a wire bond extending between and electrically connecting the first electrically conductive package contact and the first electrically conductive IC contact. The system further may include an electrically conductive adhesive extending between and electrically connecting the second electrically conductive package contact and the second electrically conductive IC contact. Use of wire bonds and electrically conductive adhesive may increase an interconnect density between the IC and the package, while not requiring an increase in size of the IC or a decrease in pitch between wire bonds.Type: GrantFiled: November 8, 2012Date of Patent: December 9, 2014Assignee: Honeywell International Inc.Inventor: David Scheid
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Publication number: 20140124962Abstract: A system may include a package defining a cavity and an integrated circuit (IC) disposed within the cavity. The package may include a first electrically conductive package contact and a second electrically conductive package contact. The IC may include a first electrically conductive IC contact and a second electrically conductive IC contact. The system also may include a wire bond extending between and electrically connecting the first electrically conductive package contact and the first electrically conductive IC contact. The system further may include an electrically conductive adhesive extending between and electrically connecting the second electrically conductive package contact and the second electrically conductive IC contact. Use of wire bonds and electrically conductive adhesive may increase an interconnect density between the IC and the package, while not requiring an increase in size of the IC or a decrease in pitch between wire bonds.Type: ApplicationFiled: November 8, 2012Publication date: May 8, 2014Applicant: Honeywell International Inc.Inventor: David Scheid
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Patent number: 8362607Abstract: An integrated circuit package includes a thermally and electrically conductive package lid. The package lid may be in electrical communication with an electrically conductive pad connected to a power plane, ground plane, or signal route in the integrated circuit. The electrically conductive package lid may provide an electrical connection for electrical power or electrical signals or may serve as an electrical ground. In some embodiments, the package lid may include a thermally and electrically conductive material. In other embodiments, the package lid may include an electrically insulative substrate coated on at least one surface with a layer of metal or another conductive material. The conductive layer may be electrically connected to electrical ground, a reference voltage, or a signal pay by at least one electrically conductive via.Type: GrantFiled: June 3, 2009Date of Patent: January 29, 2013Assignee: Honeywell International Inc.Inventors: David Scheid, Ronald James Jensen
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Patent number: 8354743Abstract: An integrated circuit package base includes a plurality of tiers. In some examples, an integrated circuit package encloses a plurality of stacked integrated circuits that are each electrically coupled to an electrical contact located on a respective tier of the package base. The tiers of the integrated circuit package can have different elevations relative to a bottom surface of the integrated circuit package.Type: GrantFiled: January 27, 2010Date of Patent: January 15, 2013Assignee: Honeywell International Inc.Inventors: Ronald James Jensen, David Scheid
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Publication number: 20110180919Abstract: An integrated circuit package base includes a plurality of tiers. In some examples, an integrated circuit package encloses a plurality of stacked integrated circuits that are each electrically coupled to an electrical contact located on a respective tier of the package base. The tiers of the integrated circuit package can have different elevations relative to a bottom surface of the integrated circuit package.Type: ApplicationFiled: January 27, 2010Publication date: July 28, 2011Applicant: HONEYWELL INTERNATIONAL INC.Inventors: Ronald James Jensen, David Scheid
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Patent number: 7979746Abstract: Processor assemblies and modules are provided. One processor assembly includes first and second processors, and first and second input/output (I/O) interfaces coupled to the first and second processors. The first and/or second I/O interfaces are configured to compare outputs of the first and second processors, and render the first and second processors inactive if the outputs are different. One processor module includes first and second buses coupled to first and second processor assemblies. The first processor assembly includes first and second processors coupled to first and second I/O interfaces, wherein the first I/O interface is coupled to the first bus and the second I/O interface is coupled to the second bus. The second processor assembly includes third and fourth processors coupled to third and fourth I/O interfaces, wherein the third I/O interface is coupled to the first bus and the fourth I/O interface is coupled to the second bus.Type: GrantFiled: April 27, 2009Date of Patent: July 12, 2011Assignee: Honeywell International Inc.Inventors: Brian Cornelius, Mitch Fletcher, James Alexander Ross, David Scheid
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Publication number: 20100308453Abstract: An integrated circuit package includes a thermally and electrically conductive package lid. The package lid may be in electrical communication with an electrically conductive pad connected to a power plane, ground plane, or signal route in the integrated circuit. The electrically conductive package lid may provide an electrical connection for electrical power or electrical signals or may serve as an electrical ground. In some embodiments, the package lid may include a thermally and electrically conductive material. In other embodiments, the package lid may include an electrically insulative substrate coated on at least one surface with a layer of metal or another conductive material. The conductive layer may be electrically connected to electrical ground, a reference voltage, or a signal pay by at least one electrically conductive via.Type: ApplicationFiled: June 3, 2009Publication date: December 9, 2010Applicant: Honeywell International Inc.Inventors: David Scheid, Ronald James Jensen
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Publication number: 20100275065Abstract: Processor assemblies and modules are provided. One processor assembly includes first and second processors, and first and second input/output (I/O) interfaces coupled to the first and second processors. The first and/or second I/O interfaces are configured to compare outputs of the first and second processors, and render the first and second processors inactive if the outputs are different. One processor module includes first and second buses coupled to first and second processor assemblies. The first processor assembly includes first and second processors coupled to first and second I/O interfaces, wherein the first I/O interface is coupled to the first bus and the second I/O interface is coupled to the second bus. The second processor assembly includes third and fourth processors coupled to third and fourth I/O interfaces, wherein the third I/O interface is coupled to the first bus and the fourth I/O interface is coupled to the second bus.Type: ApplicationFiled: April 27, 2009Publication date: October 28, 2010Applicant: HONEYWELL INTERNATIONAL INC.Inventors: Brian Cornelius, Mitch Fletcher, James Alexander Ross, David Scheid