Abstract: A transmitter has a port configured to receive a transmit signal, a first power amplifier connected to the port, a second power amplifier connected to the port, a power supply switch configured to selectively couple one of a first supply voltage terminal or a second supply voltage terminal to one of a supply terminal of the first power amplifier or a supply terminal of the second power amplifier, a first antenna output terminal connected to the first power amplifier, a second antenna output terminal connected to the second power amplifier, and a control unit configured to control the power supply switch based on a transmitter power requirement to provide an amplified transmit signal based on the transmit signal at one of the first antenna output terminal or the second antenna output terminal.

Abstract: In an embodiment, a method includes connecting a first subset of a set of stages of a power amplifier to a supply voltage, connecting a second subset of the set of stages to a reference voltage different than the supply voltage, switching a third subset of the set of stages according to a switching frequency, assigning numbers of stages in the first subset, the second subset, and the third subset based on a power requirement of the power amplifier, and amplifying a transmit signal using the first subset, the second subset, and the third subset to generate an amplified transmit signal.

Abstract: A power amplifier includes a main switched capacitor power amplifier (SCPA), a peak SCPA, and a shunt inductor. The main SCPA is electrically coupled to a load. The peak SCPA is in parallel with the main SCPA and electrically coupled to the load. The shunt inductor is electrically coupled between the peak SCPA and the load.

Abstract: A power amplifier includes a main switched capacitor power amplifier (SCPA) and a peak SCPA in parallel with the main SCPA. The main SCPA includes a plurality of first cells electrically coupled in parallel. Each first cell includes a first inverter, a tri-state second inverter in parallel with the first inverter, and a first capacitor electrically coupled in series with the first inverter and the second inverter. Each first cell also includes first control logic to apply a local oscillator (LO) signal to the first inverter or set the first inverter to a static logic state in response to a first control signal, and apply the LO signal to the second inverter or set the second inverter to a high-impedance state in response to a second control signal.

Abstract: A transmitter has a port configured to receive a transmit signal, a first power amplifier connected to the port, a second power amplifier connected to the port, a power supply switch configured to selectively couple one of a first supply voltage terminal or a second supply voltage terminal to one of a supply terminal of the first power amplifier or a supply terminal of the second power amplifier, a first antenna output terminal connected to the first power amplifier, a second antenna output terminal connected to the second power amplifier, and a control unit configured to control the power supply switch based on a transmitter power requirement to provide an amplified transmit signal based on the transmit signal at one of the first antenna output terminal or the second antenna output terminal.

Abstract: In an embodiment, a method includes connecting a first subset of a set of stages of a power amplifier to a supply voltage, connecting a second subset of the set of stages to a reference voltage different than the supply voltage, switching a third subset of the set of stages according to a switching frequency, assigning numbers of stages in the first subset, the second subset, and the third subset based on a power requirement of the power amplifier, and amplifying a transmit signal using the first subset, the second subset, and the third subset to generate an amplified transmit signal.

Abstract: A method may include designating selected stages of a power amplifier as active stages. Each active stage includes a tristate inverter having a high side switch and a low side switch connected to the high side switch at a drain node; and a capacitor connected in series with the tristate inverter. The method includes enabling a high side switch of an active stage in a high side state, enabling a low side switch of the active stage in a low side state, and disabling the high side switch and the low side switch while in a floating state while transitioning from at least one of the high side state to the low side state or the low side state to the high side state.

Abstract: In accordance with an embodiment, a method for operating a millimeter-wave power amplifier including an input transistor having an output node coupled to a load path of a cascode transistor includes: receiving a millimeter-wave transmit signal at a control node of the input transistor; amplifying the millimeter-wave transmit signal to form an output signal; providing the output signal to a load coupled to an output node of the cascode transistor; and adjusting a first DC bias current of the input transistor to form a substantially constant second DC bias current of the cascode transistor.

Abstract: In accordance with an embodiment, a method for operating a millimeter-wave power amplifier including an input transistor having an output node coupled to a load path of a cascode transistor includes: receiving a millimeter-wave transmit signal at a control node of the input transistor; amplifying the millimeter-wave transmit signal to form an output signal; providing the output signal to a load coupled to an output node of the cascode transistor; and adjusting a first DC bias current of the input transistor to form a substantially constant second DC bias current of the cascode transistor.

Abstract: In sonic examples, a method includes pre-stressing a flange, heating the flange to a die-attach temperature, and attaching a die to the flange at the die-attach temperature using a die-attach material. In some examples, the flange includes a metal material, the die-attach temperature may be at least two hundred degrees Celsius, and the die-attach material may include solder and/or an adhesive. In some examples, the method includes cooling the semiconductor die and metal flange to a room temperature after attaching the semiconductor die to the metal flange at the die-attach temperature using a die-attach material.

Abstract: Devices and methods for generating a bias voltage for a transceiver operating in time division multiplexing operation, and corresponding transceivers are provided. In this case, the bias voltage is controlled in guard intervals between transmission and reception of signals by the transceiver.

Abstract: A device includes at least one electrically conductive structure and at least one stripline. The stripline includes stripline sections that are connected to one another in a series connection between a first terminal and a second terminal. A first subset of the stripline sections is arranged on a first side of the conductive structure and a second subset of the stripline sections is arranged on a second side of the conductive structure. The device also includes at least one conductive connection between the first subset of the stripline sections and the second subset of the stripline sections, wherein the at least one conductive connection is isolated from the at least one electrically conductive structure.

Abstract: Devices and methods for generating a bias voltage for a transceiver operating in time division multiplexing operation, and corresponding transceivers are provided. In this case, the bias voltage is controlled in guard intervals between transmission and reception of signals by the transceiver.

Abstract: A circuit includes a first power transistor stage internally configured to function as a voltage-controlled current source, a second power transistor stage having an input impedance which varies as a function of input power and an interstage matching network coupling an output of the first power transistor stage to an input of the second power transistor stage. The interstage matching network is configured to provide impedance inversion between the input of the second power transistor stage and the output of the first power transistor stage. The impedance inversion provided by the interstage matching network transforms the first power transistor stage from functioning as a voltage-controlled current source to functioning as a voltage-controlled voltage source at the input of the second power transistor stage.

Abstract: Devices including a transistor having a parasitic capacitance between a control terminal and a load terminal of a first type are provided. Furthermore, the devices include advantageously arranged inductances which are electromagnetically coupled to one another and are configured at least partly to compensate for an effect of the parasitic capacitance in a range around a resonant frequency.

Abstract: A passive electrical component includes a substrate. A first metallization layer is formed on the substrate. A first dielectric layer is formed on the first metallization layer The first dielectric layer has a lower thermal conductivity than the substrate. A second metallization layer is formed on the first dielectric layer. An electrically conductive via provides an electrical connection between a first section of the first metallization layer and a second section of the second metallization layer. A thermally conductive via provides a thermally conductive path between the second section and the substrate. The thermally conductive via provides an open circuit termination to the second section of the second metallization layer.

Abstract: Devices and methods for generating a bias voltage for a transceiver operating in time division multiplexing operation, and corresponding transceivers are provided. In this case, the bias voltage is controlled in guard intervals between transmission and reception of signals by the transceiver.

Abstract: A device includes at least one electrically conductive structure and at least one stripline. The stripline includes stripline sections that are connected to one another in a series connection between a first terminal and a second terminal. A first subset of the stripline sections is arranged on a first side of the conductive structure and a second subset of the stripline sections is arranged on a second side of the conductive structure. The device also includes at least one conductive connection between the first subset of the stripline sections and the second subset of the stripline sections, wherein the at least one conductive connection is isolated from the at least one electrically conductive structure.

Abstract: Devices including a transistor having a parasitic capacitance between a control terminal and a load terminal of a first type are provided. Furthermore, the devices include advantageously arranged inductances which are electromagnetically coupled to one another and are configured at least partly to compensate for an effect of the parasitic capacitance in a range around a resonant frequency.

Abstract: Devices and methods for generating a bias voltage for a transceiver operating in time division multiplexing operation, and corresponding transceivers are provided. In this case, the bias voltage is controlled in guard intervals between transmission and reception of signals by the transceiver.