Patents by Inventor David Seibert

David Seibert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9004208
    Abstract: Energy storage device for storing electric energy for the partial or complete electrical drive of a vehicle, wherein the device has energy storages and power storages, a drive unit of a vehicle with an energy storage device as well as method for operating an energy storage device.
    Type: Grant
    Filed: May 19, 2010
    Date of Patent: April 14, 2015
    Assignee: FEV GmbH
    Inventors: David Seibert, Jens Bockstette, Dragan Skundric, Martin Rosekeit
  • Patent number: 8782591
    Abstract: In one embodiment of the invention, a method of synthesizing physical gates from register transfer logic code for an integrated circuit design is disclosed. The method includes reading a register transfer level (RTL) input file describing an integrated circuit design; parsing and translating the RTL input file into a plurality of Boolean logic equations; translating the plurality of Boolean logic equations into a plurality of logic primitives; placing the plurality of logic primitives into a floorplan of the integrated circuit design, wherein the placement of the plurality of logic primitives defines wire interconnects; and optimizing each of the plurality of Boolean logic equations in response to wire costs and wire timing delays.
    Type: Grant
    Filed: December 31, 2012
    Date of Patent: July 15, 2014
    Assignee: Cadence Design Systems, Inc.
    Inventors: Tsuwei Ku, David Seibert, Huey-Yih Wang, Hua Song, Kai Zhu, Yu-Fang Chung, Ankush Sood
  • Publication number: 20120181954
    Abstract: Energy storage device for storing electric energy for the partial or complete electrical drive of a vehicle, wherein the device has energy storages and power storages, a drive unit of a vehicle with an energy storage device as well as method for operating an energy storage device.
    Type: Application
    Filed: May 19, 2010
    Publication date: July 19, 2012
    Inventors: David Seibert, Jens Bockstette, Dragan Skundric, Martin RosekeĆ­t
  • Patent number: 7559040
    Abstract: In optimizing a design of an integrated circuit, an iteration of a logic optimization process is performed that at least partially optimizes a circuit design such that there is slack remaining in one or more combinational logic paths in the circuit design following the iteration. A clock latency scheduling process is performed that respectively distributes the remaining slack of one or more respective combinational logic paths in the circuit design across respective registers in the circuit design. Another iteration of the logic optimization process is performed that uses at least a portion of the distributed slack to further optimize the circuit design.
    Type: Grant
    Filed: March 10, 2006
    Date of Patent: July 7, 2009
    Assignee: Cadence Design Systems, Inc.
    Inventors: Christoph Albrecht, Andreas Kuehlmann, David Seibert, Sascha Richter
  • Patent number: D645764
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: September 27, 2011
    Assignee: Lifeway Christian Resources of the Southern Baptist Covention
    Inventors: Rick Mathis, Matt Stewart, Laura Dunkley, Bill Buckles, David Seibert, Cossy Pachares, Antonio B. Soria, Robert Kryger, Wesley Beck, Matthew Muller
  • Patent number: D647792
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: November 1, 2011
    Assignee: Lifeway Christian Resources of the Southern Baptist Convention
    Inventors: Rick Mathis, Matt Stewart, Laura Dunkley, Bill Buckles, David Seibert, Cossy Pachares, Antonio B. Soria, Robert Kryger, Wesley Beck, Matthew Muller