Abstract: An apparatus and method for efficiently processing invariant operations on a parallel execution engine.

Abstract: A method includes simulating a first design of a semiconductor memory that includes at least one device disposed between and coupled to a memory bit cell and to a power supply line, determining if at least one simulated operational value of the semiconductor memory is above a threshold value, and adjusting at least one of a size of the device or a type of the device if the at least one simulated operational value is below the threshold value. The memory bit cell is disposed in a column including a plurality of bit cells. The size or type of the device is repeatedly adjusted and the design of the semiconductor memory is repeatedly simulated until the at least one simulated operational value is at or above the threshold value.

Abstract: The invention comprises a small form-factor solid-state light engine that provides uniform lighting with high efficiency. The invention provides uniform lighting by practically eliminating any “dead spot” produced by conventional light engines. The invention produces light more effectively and thus fewer light engines need to be employed in a given lighting arrangement. The invention is modular, easily accommodating fiber optics of various sizes and shapes with minimal modification to the components of the light engine.

Abstract: A channel letter or light box illumination apparatus wherein the channel letter or light box is illuminated from a luminaire located at some distance from the channel letter or light box, ideally in a location expeditious to servicing replaceable components such as lamps and driver electronics. A light engine includes one or more light ports, with each port capable of conveying light via optical light guides for the purpose of illuminating a portion or entirety of the light box or channel letter. A singular light guide or plurality of light guides enters the side or rear of the channel letter or light box and are coupled to side-lit light guides. The side-lit light guides, which may be bent and formed, convey light and distribute it through out the channel letter or light box.

Abstract: The present invention describes circuitry and a method of providing a low power WRITE mode of operation for an integrated circuit comprising an SRAM memory to provide a reduced IDDQ relative to the IDDQ of a full active mode. In one aspect, the circuitry includes an SRAM memory array, mode control circuitry coupled to the array and configured to alter a supply voltage level to the SRAM array based on a mode of operation. The circuitry also includes control inputs coupled to the mode control circuitry for selecting one of the low power write mode, the full active mode, and optionally a retention mode of operation. The mode control circuitry is configured to receive the control inputs to select one of the three modes of operation, and to alter one or more supply voltage levels to the array, for example, the Vss supply voltage using a Vss supply circuit and the Vdd supply voltage using a Vdd supply circuit, based on the selected mode of operation.

Abstract: The present invention describes circuitry and a method of providing a low power WRITE mode of operation for an integrated circuit comprising an SRAM memory to provide a reduced IDDQ relative to the IDDQ of a full active mode. In one aspect, the circuitry includes an SRAM memory array, mode control circuitry coupled to the array and configured to alter a supply voltage level to the SRAM array based on a mode of operation. The circuitry also includes control inputs coupled to the mode control circuitry for selecting one of the low power write mode, the full active mode, and optionally a retention mode of operation. The mode control circuitry is configured to receive the control inputs to select one of the three modes of operation, and to alter one or more supply voltage levels to the array, for example, the Vss supply voltage using a Vss supply circuit and the Vdd supply voltage using a Vdd supply circuit, based on the selected mode of operation.

Abstract: The present invention describes circuitry and a method of providing a low power WRITE mode of operation for an integrated circuit comprising an SRAM memory to provide a reduced IDDQ relative to the IDDQ of a full active mode. In one aspect, the circuitry includes an SRAM memory array, mode control circuitry coupled to the array and configured to alter a supply voltage level to the SRAM array based on a mode of operation. The circuitry also includes control inputs coupled to the mode control circuitry for selecting one of the low power write mode, the full active mode, and optionally a retention mode of operation. The mode control circuitry is configured to receive the control inputs to select one of the three modes of operation, and to alter one or more supply voltage levels to the array, for example, the Vss supply voltage using a Vss supply circuit and the Vdd supply voltage using a Vdd supply circuit, based on the selected mode of operation.

Abstract: A channel letter or light box illumination apparatus wherein the channel letter or light box is illuminated from a luminaire located at some distance from the channel letter or light box, ideally in a location expeditious to servicing replaceable components such as lamps and driver electronics. A light engine includes one or more light ports, with each port capable of conveying light via optical light guides for the purpose of illuminating a portion or entirety of the light box or channel letter. A singular light guide or plurality of light guides enters the side or rear of the channel letter or light box and are coupled to side-lit light guides. The side-lit light guides, which may be bent and formed, convey light and distribute it through out the channel letter or light box.

Abstract: A method, apparatus, and computer usable code to manage data requests in a file system. A file access request is received from a client data processing system for a file access operation on a file in the file system. A determination is made as to whether the entry is present for the client in response to receiving the file access request. An open request is sent to the file system to open the file in response to the entry being absent. A cookie is received from the file system in response to sending the open request. An entry is created for the client and file with the cookie, and the file access request is sent to the file system using the cookie. Subsequent file access requests are sent to the file system using the same cookie in response to the entry being present.