Patents by Inventor David Shidner
David Shidner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11524390Abstract: The present invention provides methods of manufacturing a chemical mechanical polishing (CMP polishing) layer for polishing substrates, such as semiconductor wafers comprising providing a composition of a plurality of liquid-filled microelements having a polymeric shell; classifying the composition via centrifugal air classification to remove fines and coarse particles and to produce liquid-filled microelements having a density of 800 to 1500 g/liter; and, forming the CMP polishing layer by (i) converting the classified liquid-filled microelements into gas-filled microelements by heating them, then mixing them with a liquid polymer matrix forming material and casting or molding the resulting mixture to form a polymeric pad matrix, or (ii) combining the classified liquid-filled microelements directly with the liquid polymer matrix forming material, and casting or molding.Type: GrantFiled: May 1, 2017Date of Patent: December 13, 2022Assignee: Rohm and Haas Electronic Materials CMP Holdings, Inc.Inventors: Bainian Qian, George C. Jacob, Andrew Wank, David Shidner, Kancharla-Arun K. Reddy, Donna Marie Alden, Marty W. DeGroot
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Publication number: 20180311792Abstract: The present invention provides methods of manufacturing a chemical mechanical polishing (CMP polishing) layer for polishing substrates, such as semiconductor wafers comprising providing a composition of a plurality of liquid-filled microelements having a polymeric shell; classifying the composition via centrifugal air classification to remove fines and coarse particles and to produce liquid-filled microelements having a density of 800 to 1500 g/liter; and, forming the CMP polishing layer by (i) converting the classified liquid-filled microelements into gas-filled microelements by heating them, then mixing them with a liquid polymer matrix forming material and casting or molding the resulting mixture to form a polymeric pad matrix, or (ii) combining the classified liquid-filled microelements directly with the liquid polymer matrix forming material, and casting or molding.Type: ApplicationFiled: May 1, 2017Publication date: November 1, 2018Inventors: Bainian Qian, George C. Jacob, Andrew Wank, David Shidner, Kancharla-Arun K. Reddy, Donna Marie Alden, Marty W. DeGroot
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Patent number: 6860802Abstract: An improved pad and process for polishing metal damascene structures on a semiconductor wafer. The process includes the steps of pressing the wafer against the surface of a polymer sheet in combination with an aqueous-based liquid that optionally contains sub-micron particles and providing a means for relative motion of wafer and polishing pad under pressure so that the moving pressurized contact results in planar removal of the surface of said wafer, wherein the polishing pad has a low elastic recovery when said load is removed, so that the mechanical response of the sheet is largely anelastic. The improved pad is characterized by a high energy dissipation coupled with a high pad stiffness. The pad exhibits a stable morphology that can be reproduced easily and consistently. The pad surface resists glazing, thereby requiring less frequent and less aggressive conditioning.Type: GrantFiled: June 30, 2000Date of Patent: March 1, 2005Assignee: Rohm and Haas Electric Materials CMP Holdings, Inc.Inventors: Arun Vishwanathan, David B. James, Lee Melbourne Cook, Peter A. Burke, David Shidner
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Publication number: 20050020082Abstract: An improved pad and process for polishing metal damascene structures on a semiconductor wafer. The process includes the steps of pressing the wafer against the surface of a polymer sheet in combination with an aqueous-based liquid that optionally contains sub-micron particles and providing a means for relative motion of wafer and polishing pad under pressure so that the moving pressurized contact results in planar removal of the surface of said wafer, wherein the polishing pad has a low elastic recovery when said load is removed, so that the mechanical response of the sheet is largely anelastic. The improved pad is characterized by a high energy dissipation coupled with a high pad stiffness. The pad exhibits a stable morphology that can be reproduced easily and consistently. The pad surface resists glazing, thereby requiring less frequent and less aggressive conditioning.Type: ApplicationFiled: August 20, 2004Publication date: January 27, 2005Inventors: Arun Vishwanathan, David James, Lee Cook, Peter Burke, David Shidner
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Patent number: 6749485Abstract: An improved pad and process for polishing metal damascene structures on a semiconductor wafer. The process includes the steps of pressing the wafer against the surface of a polymer sheet in combination with an aqueous-based liquid that optionally contains sub-micron particles and providing a means for relative motion of wafer and polishing pad under pressure so that the moving pressurized contact results in planar removal of the surface of said wafer, wherein the polishing pad has a low elastic recovery when said load is removed, so that the mechanical response of the sheet is largely anelastic. The improved pad is characterized by a high energy dissipation coupled with a high pad stiffness and hydrolytic stability.Type: GrantFiled: September 20, 2000Date of Patent: June 15, 2004Assignee: Rodel Holdings, Inc.Inventors: David B. James, Arun Vishwanathan, Lee Melbourne Cook, Peter A. Burke, David Shidner, Joseph K. So, John V. H. Roberts
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Patent number: 6736709Abstract: An improved pad and process for polishing metal damascene structures on a semiconductor wafer. The process includes the steps of pressing the wafer against the surface of a polymer sheet in combination with an aqueous-based liquid that optionally contains sub-micron particles and providing a means for relative motion of wafer and polishing, pad under pressure so that the moving pressurized contact results in planar removal of the surface of said wafer, wherein the polishing pad has a low elastic recovery when said load is removed, so that the mechanical response of the sheet is largely anelastic. The improved pad is characterized by a high energy dissipation coupled with a high pad stiffness. The pad also exhibits a stable morphology that can be reproduced easily and consistently. The pad surface has macro-texture that includes perforations as well as surface groove designs The surface groove designs have specific relationships between groove depth and overall pad thickness and groove.area and land area.Type: GrantFiled: August 3, 2000Date of Patent: May 18, 2004Assignee: Rodel Holdings, Inc.Inventors: David B. James, Arun Vishwanathan, Lee Melbourne Cook, Peter A. Burke, David Shidner, Joseph K. So, John V. H. Roberts
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Patent number: 6582283Abstract: An improved pad and process for polishing metal damascene structures on a semiconductor wafer. The process includes the steps of pressing the wafer against the surface of a polymer sheet in combination with an aqueous-based liquid that optionally contains sub-micron particles and providing a means for relative motion of wafer and polishing pad under pressure so that the moving pressurized contact results in planar removal of the surface of said wafer, wherein the polishing pad has a low elastic recovery when said load is removed, so that the mechanical response of the sheet is largely anelastic. The improved pad is characterized by a high energy dissipation coupled with a high pad stiffness. The pad exhibits a stable morphology that can be reproduced easily and consistently. The pad surface resists glazing, thereby requiring less frequent and less aggressive conditioning.Type: GrantFiled: July 11, 2002Date of Patent: June 24, 2003Assignee: Rodel Holdings, Inc.Inventors: David B. James, Arun Vishwanathan, Lee Melbourne Cook, Peter A. Burke, David Shidner
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Publication number: 20030027500Abstract: An improved pad and process for polishing metal damascene structures on a semiconductor wafer. The process includes the steps of pressing the wafer against the surface of a polymer sheet in combination with an aqueous-based liquid that optionally contains sub-micron particles and providing a means for relative motion of wafer and polishing pad under pressure so that the moving pressurized contact results in planar removal of the surface of said wafer, wherein the polishing pad has a low elastic recovery when said load is removed, so that the mechanical response of the sheet is largely anelastic. The improved pad is characterized by a high energy dissipation coupled with a high pad stiffness. The pad exhibits a stable morphology that can be reproduced easily and consistently. The pad surface resists glazing, thereby requiring less frequent and less aggressive conditioning.Type: ApplicationFiled: July 11, 2002Publication date: February 6, 2003Inventors: David B. James, Arun Vishwanathan, Lee Melbourne Cook, Peter A. Burke, David Shidner
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Patent number: 6454634Abstract: An improved pad and process for polishing metal damascene structures on a semiconductor wafer. The process includes the steps of pressing the wafer against the surface of a polymer sheet in combination with an aqueous-based liquid that optionally contains sub-micron particles and providing a means for relative motion of wafer and polishing pad under pressure so that the moving pressurized contact results in planar removal of the surface of said wafer, wherein the polishing pad has a low elastic recovery when said load is removed, so that the mechanical response of the sheet is largely anelastic. The improved pad is characterized by a high energy dissipation coupled with a high pad stiffness. The pad exhibits a stable morphology that can be reproduced easily and consistently. The pad surface resists glazing, thereby requiring less frequent and less aggressive conditioning.Type: GrantFiled: August 3, 2000Date of Patent: September 24, 2002Assignee: Rodel Holdings Inc.Inventors: David B. James, Arun Vishwanathan, Lee Melbourne Cook, Peter A. Burke, David Shidner