Patents by Inventor David Shing-Ki Kung

David Shing-Ki Kung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230342417
    Abstract: A batched Cholesky decomposition method, system, and non-transitory computer readable medium for a Graphics Processing Unit (GPU), include mirroring matrices to form paired matrices solving the paired matrices simultaneously.
    Type: Application
    Filed: June 30, 2023
    Publication date: October 26, 2023
    Inventors: Minsik Cho, David Shing-ki Kung, Ruchir Puri
  • Patent number: 11790035
    Abstract: A batched Cholesky decomposition method, system, and non-transitory computer readable medium for a Graphics Processing Unit (GPU), include mirroring matrices to form paired matrices solving the paired matrices simultaneously.
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: October 17, 2023
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Minsik Cho, David Shing-ki Kung, Ruchir Puri
  • Publication number: 20210263994
    Abstract: A batched Cholesky decomposition method, system, and non-transitory computer readable medium for a Graphics Processing Unit (GPU), include mirroring matrices to form paired matrices solving the paired matrices simultaneously.
    Type: Application
    Filed: May 10, 2021
    Publication date: August 26, 2021
    Inventors: Minsik Cho, David Shing-ki Kung, Ruchir Puri
  • Patent number: 11036829
    Abstract: A batched Cholesky decomposition method, system, and non-transitory computer readable medium for a Graphics Processing Unit (GPU), include mirroring a second problem matrix of a second problem to a first problem matrix of a first problem as paired matrices and shifting the second problem matrix by N+1 and combining the first problem matrix and the mirrored second problem matrix into one matrix of (N+1)×N, where the first problem shared memory comprises regular intervals, where the second problem shared memory is continuous, and where the GPU performs batched dense Cholesky decomposition with the one matrix from the combining to accelerate the Cholesky decomposition.
    Type: Grant
    Filed: October 28, 2019
    Date of Patent: June 15, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Minsik Cho, David Shing-ki Kung, Ruchir Puri
  • Patent number: 10740232
    Abstract: An iterative graph algorithm accelerating method, system, and computer program product, include recording an order of access nodes in a memory layout, reordering the access nodes in the memory layout in accordance with the recorded order, and updating edge information of the reordered access nodes.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: August 11, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Minsik Cho, Daniel Brand, Ulrich Alfons Finkler, David Shing-ki Kung, Ruchir Puri
  • Patent number: 10572569
    Abstract: A batched Cholesky decomposition method, system, and non-transitory computer readable medium for a Graphics Processing Unit (GPU), include mirroring a second problem matrix of a second problem to a first problem matrix of a first problem as paired matrices and shifting the second problem matrix by N+1 and combining the first problem matrix and the mirrored second problem matrix into one matrix of (N+1)×N by merging the first problem matrix and the mirrored second problem matrix. The first problem matrix and the second problem matrix are symmetric and positive definite matrices.
    Type: Grant
    Filed: June 13, 2019
    Date of Patent: February 25, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Minsik Cho, David Shing-ki Kung, Ruchir Puri
  • Publication number: 20200057790
    Abstract: A batched Cholesky decomposition method, system, and non-transitory computer readable medium for a Graphics Processing Unit (GPU), include mirroring a second problem matrix of a second problem to a first problem matrix of a first problem as paired matrices and shifting the second problem matrix by N+1 and combining the first problem matrix and the mirrored second problem matrix into one matrix of (N+1)×N, where the first problem shared memory comprises regular intervals, where the second problem shared memory is continuous, and where the GPU performs batched dense Cholesky decomposition with the one matrix from the combining to accelerate the Cholesky decomposition.
    Type: Application
    Filed: October 28, 2019
    Publication date: February 20, 2020
    Inventors: Minsik Cho, David Shing-ki Kung, Ruchir Puri
  • Publication number: 20190294651
    Abstract: A batched Cholesky decomposition method, system, and non-transitory computer readable medium for a Graphics Processing Unit (GPU), include mirroring a second problem matrix of a second problem to a first problem matrix of a first problem as paired matrices and shifting the second problem matrix by N+1 and combining the first problem matrix and the mirrored second problem matrix into one matrix of (N+1)×N by merging the first problem matrix and the mirrored second problem matrix. The first problem matrix and the second problem matrix are symmetric and positive definite matrices.
    Type: Application
    Filed: June 13, 2019
    Publication date: September 26, 2019
    Inventors: Minsik Cho, David Shing-ki Kung, Ruchir Puri
  • Patent number: 10423695
    Abstract: A batched Cholesky decomposition method, system, and non-transitory computer readable medium for a Graphics Processing Unit (GPU), include mirroring a second problem matrix of a second problem to a first problem matrix of a first problem as paired matrices and shifting the second problem by N+1, combining the first problem matrix and the mirrored second problem matrix into one matrix of (N+1)×N, and reading the fixed size data length of the one square matrix with a fixed data interval for both the first problem and the second problem.
    Type: Grant
    Filed: March 8, 2018
    Date of Patent: September 24, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Minsik Cho, David Shing-ki Kung, Ruchir Puri
  • Publication number: 20190114260
    Abstract: An iterative graph algorithm accelerating method, system, and computer program product, include recording an order of access nodes in a memory layout, reordering the access nodes in the memory layout in accordance with the recorded order, and updating edge information of the reordered access nodes.
    Type: Application
    Filed: December 12, 2018
    Publication date: April 18, 2019
    Inventors: Minsik Cho, Daniel Brand, Ulrich Alfons Finkler, David Shing-ki Kung, Ruchir Puri
  • Patent number: 10209913
    Abstract: An iterative graph algorithm accelerating method, system, and computer program product, include recording an order of access nodes in a memory layout, reordering the access nodes in the memory layout in accordance with the recorded order, and updating edge information of the reordered access nodes.
    Type: Grant
    Filed: January 31, 2017
    Date of Patent: February 19, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Minsik Cho, Daniel Brand, Ulrich Alfons Finkler, David Shing-ki Kung, Ruchir Puri
  • Publication number: 20180217775
    Abstract: An iterative graph algorithm accelerating method, system, and computer program product, include recording an order of access nodes in a memory layout, reordering the access nodes in the memory layout in accordance with the recorded order, and updating edge information of the reordered access nodes.
    Type: Application
    Filed: January 31, 2017
    Publication date: August 2, 2018
    Inventors: Minsik Cho, Daniel Brand, Ulrich Alfons Finkler, David Shing-ki Kung, Ruchir Puri
  • Publication number: 20180196779
    Abstract: A batched Cholesky decomposition method, system, and non-transitory computer readable medium for a Graphics Processing Unit (GPU), include mirroring a second problem matrix of a second problem to a first problem matrix of a first problem as paired matrices and shifting the second problem by N+1, combining the first problem matrix and the mirrored second problem matrix into one matrix of (N+1)×N, and reading the fixed size data length of the one square matrix with a fixed data interval for both the first problem and the second problem.
    Type: Application
    Filed: March 8, 2018
    Publication date: July 12, 2018
    Inventors: Minsik Cho, David Shing-ki Kung, Ruchir Puri
  • Patent number: 9984041
    Abstract: A batched Cholesky decomposition method, system, and non-transitory computer readable medium for a Graphics Processing Unit (GPU) including at least a first problem and a second problem, include mirroring a second problem matrix of the second problem to a first problem matrix of the first problem, combining the first problem matrix and the mirrored second problem matrix into a single problem matrix, and allocating data read to a thread and to the first problem and the second problem, respectively.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: May 29, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Minsik Cho, David Shing-ki Kung, Ruchir Puri
  • Publication number: 20180004707
    Abstract: A batched Cholesky decomposition method, system, and non-transitory computer readable medium for a Graphics Processing Unit (GPU) including at least a first problem and a second problem, include mirroring a second problem matrix of the second problem to a first problem matrix of the first problem, combining the first problem matrix and the mirrored second problem matrix into a single problem matrix, and allocating data read to a thread and to the first problem and the second problem, respectively.
    Type: Application
    Filed: June 30, 2016
    Publication date: January 4, 2018
    Inventors: Minsik Cho, David Shing-ki Kung, Ruchir Puri
  • Patent number: 5784290
    Abstract: An efficient method for partitioning, for example, FPGA devices is described which optimizes the number of devices required to implement a design. The method involves generating a hierarchical graph of a feasible bipartition of the cells of the design. Feasible pairs are merged, followed by flattening of the hierarchical graph. The number of I/O pins of the new partition is then reduced, upon which a hierarchical graph is derived. A perturbed partition is then generated, followed by restoration of feasibility.
    Type: Grant
    Filed: June 24, 1997
    Date of Patent: July 21, 1998
    Assignee: International Business Machines Corporation
    Inventors: David Shing-Ki Kung, Lakshmi Narasimha Reddy
  • Patent number: 5675500
    Abstract: An efficient method for partitioning, for example, FPGA devices is described which optimizes the number of devices required to implement a design. The method involves generating a hierarchical graph of a feasible bipartition of the cells of the design. Feasible pairs are merged, followed by flattening of the hierarchical graph. The number of I/O pins of the new partition is then reduced, upon which a hierarchical graph is derived. A perturbed partition is then generated, followed by restoration of feasibility.
    Type: Grant
    Filed: October 18, 1994
    Date of Patent: October 7, 1997
    Assignee: International Business Machines Corporation
    Inventors: David Shing-Ki Kung, Lakshmi Narasimha Reddy