Patents by Inventor David Shykind
David Shykind has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11959915Abstract: A method of fabricating a device includes fabricating conductive surfaces including one or more capture surfaces and one or more reference surfaces, attaching a first molecular wire to each capture surface, and attaching a second molecular wire to each reference surface. The first and second molecular wires include chiral oligonucleotide multiplexes having identical nucleobase sequences and opposite absolute configuration. The first molecular wire includes a first oligonucleotide strand conjugated to a first functional handle including a sulfur-containing compound, and a second oligonucleotide strand conjugated to a capture agent that interacts with a target entity. The second molecular wire includes a first oligonucleotide strand conjugated to a second functional handle including a sulfur-containing compound, and a second oligonucleotide strand conjugated to a reference compound. The first and second oligonucleotide strands of each molecular wire are complementary and have the same absolute configuration.Type: GrantFiled: May 1, 2023Date of Patent: April 16, 2024Assignee: VELANIDI TECHNOLOGIES LLCInventors: Jane Ni, David Shykind, Devin Wiley
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Publication number: 20230266310Abstract: A method of fabricating a device includes fabricating conductive surfaces including one or more capture surfaces and one or more reference surfaces, attaching a first molecular wire to each capture surface, and attaching a second molecular wire to each reference surface. The first and second molecular wires include chiral oligonucleotide multiplexes having identical nucleobase sequences and opposite absolute configuration. The first molecular wire includes a first oligonucleotide strand conjugated to a first functional handle including a sulfur-containing compound, and a second oligonucleotide strand conjugated to a capture agent that interacts with a target entity. The second molecular wire includes a first oligonucleotide strand conjugated to a second functional handle including a sulfur-containing compound, and a second oligonucleotide strand conjugated to a reference compound. The first and second oligonucleotide strands of each molecular wire are complementary and have the same absolute configuration.Type: ApplicationFiled: May 1, 2023Publication date: August 24, 2023Inventors: Jane Ni, David Shykind, Devin Wiley
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Patent number: 11674957Abstract: Enantiomeric pairs of molecular wires comprised of oligomeric nucleic acids, wherein the oligomers of each wire possess identical nucleobase pair sequences and thus identical conductivity as between wires, are constructed and used to sense biological or chemical entities of interest at the cellular or molecular level. The oligomeric molecular wires conduct voltage inputs to sensing subsystem integrated circuitry, either from an electrostatic potential arising from a targeting agent (i.e., a capture agent) binding to an intended biological or chemical target molecule, or from an electrostatic potential associated with a reference molecule that has non-specific interactions with the environment. The chirality of the oligomers imparts selectivity to either the targeting agent or the reference molecule during assembly of the sensing subsystem.Type: GrantFiled: April 30, 2021Date of Patent: June 13, 2023Assignee: VELANIDI TECHNOLOGIES LLCInventors: Jane Ni, David Shykind, Devin Wiley
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Publication number: 20220173034Abstract: An integrated circuit interconnect structure includes a first metallization level including a first metal line having a first sidewall and a second sidewall extending a length in a first direction. A second metal line is adjacent to the first metal line and a dielectric is between the first metal line and the second metal line. A second metallization level is above the first metallization level where the second metallization level includes a third metal line extending a length in a second direction orthogonal to the first direction. The third metal line extends over the first metal line and the second metal line but not beyond the first sidewall. A conductive via is between the first metal line and the third metal line where the conductive via does not extend beyond the first sidewall or beyond the second sidewall.Type: ApplicationFiled: February 14, 2022Publication date: June 2, 2022Applicant: Intel CorporationInventors: Manish Chandhok, Leonard Guler, Paul Nyhus, Gobind Bisht, Jonathan Laib, David Shykind, Gurpreet Singh, Eungnak Han, Noriyuki Sato, Charles Wallace, Jinnie Aloysius
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Publication number: 20220102210Abstract: Contact over active gate (COAG) structures are described. In an example, an integrated circuit structure includes a plurality of gate structures above substrate, each of the gate structures including a gate insulating layer thereon. A plurality of conductive trench contact structures is alternating with the plurality of gate structures, each of the conductive trench contact structures including a trench insulating layer thereon. A remnant of a di-block-co-polymer is over a portion of the plurality of gate structures or the plurality of conductive trench contact structures. An interlayer dielectric material is over the di-block-co-polymer, over the plurality of gate structures, and over the plurality of conductive trench contact structures. An opening in the interlayer dielectric material. A conductive structure is in the opening, the conductive structure in direct contact with a corresponding one of the trench contact structures or with a corresponding one of the gate contact structures.Type: ApplicationFiled: September 25, 2020Publication date: March 31, 2022Inventors: Paul A. NYHUS, Charles H. WALLACE, Manish CHANDHOK, Mohit K. HARAN, Gurpreet SINGH, Eungnak HAN, Florian GSTREIN, Richard E. SCHENKER, David SHYKIND, Jinnie ALOYSIUS, Sean PURSEL
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Patent number: 11251117Abstract: An integrated circuit interconnect structure includes a first metallization level including a first metal line having a first sidewall and a second sidewall extending a length in a first direction. A second metal line is adjacent to the first metal line and a dielectric is between the first metal line and the second metal line. A second metallization level is above the first metallization level where the second metallization level includes a third metal line extending a length in a second direction orthogonal to the first direction. The third metal line extends over the first metal line and the second metal line but not beyond the first sidewall. A conductive via is between the first metal line and the third metal line where the conductive via does not extend beyond the first sidewall or beyond the second sidewall.Type: GrantFiled: September 5, 2019Date of Patent: February 15, 2022Assignee: Intel CorporationInventors: Manish Chandhok, Leonard Guler, Paul Nyhus, Gobind Bisht, Jonathan Laib, David Shykind, Gurpreet Singh, Eungnak Han, Noriyuki Sato, Charles Wallace, Jinnie Aloysius
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Publication number: 20210341473Abstract: Enantiomeric pairs of molecular wires comprised of oligomeric nucleic acids, wherein the oligomers of each wire possess identical nucleobase pair sequences and thus identical conductivity as between wires, are constructed and used to sense biological or chemical entities of interest at the cellular or molecular level. The oligomeric molecular wires conduct voltage inputs to sensing subsystem integrated circuitry, either from an electrostatic potential arising from a targeting agent (i.e., a capture agent) binding to an intended biological or chemical target molecule, or from an electrostatic potential associated with a reference molecule that has non-specific interactions with the environment. The chirality of the oligomers imparts selectivity to either the targeting agent or the reference molecule during assembly of the sensing subsystem.Type: ApplicationFiled: April 30, 2021Publication date: November 4, 2021Inventors: Jane Ni, David Shykind, Devin Wiley
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Publication number: 20210074632Abstract: An integrated circuit interconnect structure includes a first metallization level including a first metal line having a first sidewall and a second sidewall extending a length in a first direction. A second metal line is adjacent to the first metal line and a dielectric is between the first metal line and the second metal line. A second metallization level is above the first metallization level where the second metallization level includes a third metal line extending a length in a second direction orthogonal to the first direction. The third metal line extends over the first metal line and the second metal line but not beyond the first sidewall. A conductive via is between the first metal line and the third metal line where the conductive via does not extend beyond the first sidewall or beyond the second sidewall.Type: ApplicationFiled: September 5, 2019Publication date: March 11, 2021Applicant: Intel CorporationInventors: Manish Chandhok, Leonard Guler, Paul Nyhus, Gobind Bisht, Jonathan Laib, David Shykind, Gurpreet Singh, Eungnak Han, Noriyuki Sato, Charles Wallace, Jinnie Aloysius
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Patent number: 9651610Abstract: Visible laser probing is described. In one example a probe device has a laser configured to provide a laser beam at a visible wavelength, an objective lens positioned in front of the laser to focus the laser beam on an active region of an integrated circuit through a back side of an integrated circuit die, and a detector positioned to receive a reflected laser beam reflected from the active region through a back side of the die, through the objective lens. The detector is configured to detect an amplitude modulation of the reflected laser beam wherein the amplitude modulation is attributable to the electric field at the active region.Type: GrantFiled: June 29, 2013Date of Patent: May 16, 2017Assignee: Intel CorporationInventors: Travis M. Eiles, Rajiv Giridharagopal, David Shykind
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Patent number: 9219623Abstract: A method, system and apparatus to self-determine equalization parameters for a channel. An initiator sends an equalization insensitive signal (EIS) to a responder on channel to be equalized and begins a count. A responder responds with an EIS. When the initiator receives the response EIS the count is terminated. The count, which constitutes a measure of delay in the channel, may be used to determine desirable equalization parameters for the channel.Type: GrantFiled: September 30, 2004Date of Patent: December 22, 2015Assignee: Intel CorporationInventors: James A. McCall, Klaus Ruff, David Shykind, Santanu Chaudhuri
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Publication number: 20150002182Abstract: Visible laser probing is described. In one example a probe device has a laser configured to provide a laser beam at a visible wavelength, an objective lens positioned in front of the laser to focus the laser beam on an active region of an integrated circuit through a back side of an integrated circuit die, and a detector positioned to receive a reflected laser beam reflected from the active region through a back side of the die, through the objective lens. The detector is configured to detect an amplitude modulation of the reflected laser beam wherein the amplitude modulation is attributable to the electric field at the active region.Type: ApplicationFiled: June 29, 2013Publication date: January 1, 2015Inventors: Travis M. Eiles, Rajiv Giridharagopal, David Shykind
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Publication number: 20140150257Abstract: A method of manufacturing a circuit board is described herein. The method may include adding a resin, forming first and second fiberglass fibers, and forming first and second signal line traces capable of transmitting electrical signals. In some examples, a ratio between fiberglass and resin material near the first signal line trace is similar to a ratio between fiberglass and resin material near the second signal line trace. In some examples, the first and second fiberglass fibers diagonally cross near the first and second signal line traces. In some examples, the first and second fiberglass fibers cross near the first and second signal line traces in a zig-zag pattern.Type: ApplicationFiled: February 5, 2014Publication date: June 5, 2014Inventors: David Shykind, James McCall
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Patent number: 8673391Abstract: A method of manufacturing a circuit board is described herein. The method may include adding a resin, forming first and second fiberglass fibers, and forming first and second signal line traces capable of transmitting electrical signals. In some examples, a ratio between fiberglass and resin material near the first signal line trace is similar to a ratio between fiberglass and resin material near the second signal line trace. In some examples, the first and second fiberglass fibers diagonally cross near the first and second signal line traces. In some examples, the first and second fiberglass fibers cross near the first and second signal line traces in a zig-zag pattern.Type: GrantFiled: April 9, 2013Date of Patent: March 18, 2014Assignee: Intel CorporationInventors: David Shykind, James A. McCall
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Patent number: 8551555Abstract: Biocompatible coatings for implantable medical devices are disclosed. Embodiments of the invention provide methods for coating an object with a biocompatible coating wherein the device is suspended using a flowing gas during the coating process. Embodiments of the invention provide tropoelastin coatings and methods of creating tropoelastin coatings for implantable medical devices. Optionally, the biocompatible coating can be a drug eluting coating.Type: GrantFiled: December 26, 2007Date of Patent: October 8, 2013Assignee: Intel CorporationInventors: John Burghard, Carmen Campbell, Todd R. Younkin, Markus Kuhn, David Shykind, Jose Maiz
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Publication number: 20130227838Abstract: A method of manufacturing a circuit board is described herein. The method may include adding a resin, forming first and second fiberglass fibers, and forming first and second signal line traces capable of transmitting electrical signals. In some examples, a ratio between fiberglass and resin material near the first signal line trace is similar to a ratio between fiberglass and resin material near the second signal line trace. In some examples, the first and second fiberglass fibers diagonally cross near the first and second signal line traces. In some examples, the first and second fiberglass fibers cross near the first and second signal line traces in a zig-zag pattern.Type: ApplicationFiled: April 9, 2013Publication date: September 5, 2013Inventors: David Shykind, James McCall
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Patent number: 8415002Abstract: A method of manufacturing a circuit board which may include the steps of forming a circuit board with horizontal and vertical fiberglass fibers, rotating the circuit board, and cutting the circuit board so that the horizontal and vertical fiberglass fibers form a non-right angle with a cut line of the circuit board. The circuit board may have a plurality of conductive traces located thereon which pass by areas of higher fiberglass-to-resin material and lower fiberglass-to-resin material to assist in reducing differential to common mode conversion between signals in the plurality of conducive traces.Type: GrantFiled: March 15, 2010Date of Patent: April 9, 2013Assignee: Intel CorporationInventors: James A. McCall, David Shykind
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Publication number: 20100170087Abstract: A method of manufacturing a circuit board which may include the steps of forming a circuit board with horizontal and vertical fiberglass fibers, rotating the circuit board, and cutting the circuit board so that the horizontal and vertical fiberglass fibers form a non-right angle with a cut line of the circuit board. The circuit board may have a plurality of conductive traces located thereon which pass by areas of higher fiberglass-to-resin material and lower fiberglass-to-resin material to assist in reducing differential to common mode conversion between signals in the plurality of conducive traces.Type: ApplicationFiled: March 15, 2010Publication date: July 8, 2010Inventors: James A. McCALL, David Shykind
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Patent number: 7676917Abstract: A method of manufacturing a circuit board which may include the steps of forming a circuit board with horizontal and vertical fiberglass fibers, rotating the circuit board, and cutting the circuit board so that the horizontal and vertical fiberglass fibers form a non-right angle with a cut line of the circuit board. The circuit board may have a plurality of conductive traces located thereon which pass by areas of higher fiberglass-to-resin material and lower fiberglass-to-resin material to assist in reducing differential to common mode conversion between signals in the plurality of conducive traces.Type: GrantFiled: March 26, 2007Date of Patent: March 16, 2010Assignee: Intel CorporationInventors: James A. McCall, David Shykind
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Patent number: 7660054Abstract: Embodiments allow for uniform die cooling or heating with a solid immersion lens equipped microscope over a larger temperature range than is currently attainable using liquid coolant. The SIL tip is insulated from the rest of the objective body to realize a controllable temperature. This thermal control may be done by convection or Joule heating. If the tip is to be cooled, cold gas may be injected through channels around the tip and fins. If the tip is to be heated, hot gas may be injected around the tip and fins 208 or an electrical heater may be thermal anchored to the tip and a current passed through it to deliver power.Type: GrantFiled: June 29, 2007Date of Patent: February 9, 2010Assignee: Intel CorporationInventors: Cameron Wagner, David Shykind, Travis Eiles
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Publication number: 20090169714Abstract: Biocompatible coatings for implantable medical devices are disclosed. Embodiments of the invention provide methods for coating an object with a biocompatible coating wherein the device is suspended using a flowing gas during the coating process. Embodiments of the invention provide tropoelastin coatings and methods of creating tropoelastin coatings for implantable medical devices. Optionally, the biocompatible coating can be a drug eluting coating.Type: ApplicationFiled: December 26, 2007Publication date: July 2, 2009Inventors: John Burghard, Carmen Campbell, Todd R. Younkin, Markus Kuhn, David Shykind, Jose Maiz