Abstract: A ganged connector assembly includes: a housing; a plurality of first coaxial connectors mounted in the housing; a plurality of first coaxial cables, each attached to a respective one of the plurality of first coaxial connectors; and a second coaxial cable electrically connected with a first one of the first coaxial connectors, the second coaxial cable configured to transmit AISG signals to the first one of the first coaxial connectors.

Abstract: A cache memory that selectively enables and disables speculative reads from system memory is disclosed. The cache memory may include a plurality of partitions, and a plurality of registers. Each register may be configured to stored data indicative of a source of returned data for previous requests directed to a corresponding partition. Circuitry may be configured to receive a request for data to a given partition. The circuitry may be further configured to read contents of a register corresponding to the given partition, and initiate a speculative read dependent upon the contents of the register.

Abstract: A system is disclosed in which the system may include multiple bus switches, and multiple processors. Each processor may be coupled to each bus switch. Each processor may be configured to initiate a transfer of data to a given bus switch, and detect if a respective link to the given bus switch is inoperable. In response to detecting an inoperable link to a first bus switch, a given processor may be further configured to send a notification message to at least one other processor via at least a second bus switch and to remove routing information corresponding to the inoperable link from a first register. The at least one other processor may be configured to remove additional routing information corresponding to the inoperable link from a second register in response to receiving the notification message from the given processor.

Abstract: A method and apparatus for performing non-temporal write combining using existing cache resources is disclosed. In one embodiment, a method includes executing a first thread on a processor core, the first thread including a first block initialization store (BIS) instruction. A cache query may be performed responsive to the BIS instruction, and if the query results in a cache miss, a cache line may be installed in a cache in an unordered dirty state in which it is exclusively owned by the first thread. The first BIS instruction and one or more additional BIS instructions may write data from the first processor core into the first cache line. After a cache coherence response is received, the state of the first cache line may be changed to an ordered dirty state in which it is no longer exclusive to the first thread.

Abstract: A method and apparatus for snooping caches is disclosed. In one embodiment, a system includes a number of processing nodes and a cache shared by each of the processing nodes. The cache is partitioned such that each of the processing nodes utilizes only one assigned partition. If a query by a processing node to its assigned partition of the cache results in a miss, a cache controller may determine whether to snoop other partitions in search of the requested information. The determination may be made based on history of where requested information was obtained from responsive to previous misses in that partition.

Abstract: A coaxial cable-connector assembly includes a coaxial cable and a coaxial cable connector. The coaxial cable includes: a central conductor having a connector end; a dielectric layer that overlies the central conductor; and an outer conductor that overlies the dielectric layer having a connector end. The coaxial connector includes: a central conductor extension configured to mate with a mating connector at one end; a first insulative layer interposed between an opposed second end of the central conductor extension and the connector end of the central conductor; an outer conductor extension configured to mate with a mating connector at one end; and a second insulative layer interposed between an opposed second end of the outer conductor extension and the connector end of the outer conductor. This configuration can reduce and/or avoid PIM within the connection of two coaxial connectors.

Abstract: A method and apparatus for snooping caches is disclosed. In one embodiment, a system includes a number of processing nodes and a cache shared by each of the processing nodes. The cache is partitioned such that each of the processing nodes utilizes only one assigned partition. If a query by a processing node to its assigned partition of the cache results in a miss, a cache controller may determine whether to snoop other partitions in search of the requested information. The determination may be made based on history of where requested information was obtained from responsive to previous misses in that partition.

Abstract: A method and apparatus for performing non-temporal write combining using existing cache resources is disclosed. In one embodiment, a method includes executing a first thread on a processor core, the first thread including a first block initialization store (BIS) instruction. A cache query may be performed responsive to the BIS instruction, and if the query results in a cache miss, a cache line may be installed in a cache in an unordered dirty state in which it is exclusively owned by the first thread. The first BIS instruction and one or more additional BIS instructions may write data from the first processor core into the first cache line. After a cache coherence response is received, the state of the first cache line may be changed to an ordered dirty state in which it is no longer exclusive to the first thread.

Abstract: A coaxial cable-connector assembly includes a coaxial cable and a right angle coaxial connector. The cable comprises: an inner conductor having a termination end; a first dielectric layer; and an outer conductor having a termination end. The connector comprises: an inner contact comprising a post configured to mate with the inner conductor body of a mating cable jack, the inner contact further including a receptacle that receives the termination end of the inner conductor such that the post is generally perpendicular to the inner conductor; and an outer conductor body configured to mate with the outer conductor body of the mating jack, the outer conductor body being connected with the termination end of the outer conductor. A second dielectric layer is interposed between the inner contact of the connector and the inner conductor of the coaxial cable that creates a capacitive element between the inner contact and the inner conductor.

Abstract: A system is disclosed in which the system may include multiple bus switches, and multiple processors. Each processor may be coupled to each bus switch. Each processor may be configured to initiate a transfer of data to a given bus switch, and detect if a respective link to the given bus switch is inoperable. In response to detecting an inoperable link to a first bus switch, a given processor may be further configured to send a notification message to at least one other processor via at least a second bus switch and to remove routing information corresponding to the inoperable link from a first register. The at least one other processor may be configured to remove additional routing information corresponding to the inoperable link from a second register in response to receiving the notification message from the given processor.

Abstract: A coaxial cable-connector assembly includes a coaxial cable and a coaxial cable connector. The coaxial cable includes: a central conductor having a connector end; a dielectric layer that overlies the central conductor; and an outer conductor that overlies the dielectric layer having a connector end. The coaxial connector includes: a central conductor extension configured to mate with a mating connector at one end; a first insulative layer interposed between an opposed second end of the central conductor extension and the connector end of the central conductor; an outer conductor extension configured to mate with a mating connector at one end; and a second insulative layer interposed between an opposed second end of the outer conductor extension and the connector end of the outer conductor. This configuration can reduce and/or avoid PIM within the connection of two coaxial connectors.

Abstract: A coaxial cable-connector assembly includes a coaxial cable and a coaxial cable connector. The coaxial cable includes: a central conductor having a connector end; a dielectric layer that overlies the central conductor; and an outer conductor that overlies the dielectric layer having a connector end. The coaxial connector includes: a central conductor extension configured to mate with a mating connector at one end; a first insulative layer interposed between an opposed second end of the central conductor extension and the connector end of the central conductor; an outer conductor extension configured to mate with a mating connector at one end; and a second insulative layer interposed between an opposed second end of the outer conductor extension and the connector end of the outer conductor. This configuration can reduce and/or avoid PIM within the connection of two coaxial connectors.

Abstract: A cache memory that selectively enables and disables speculative reads from system memory is disclosed. The cache memory may include a plurality of partitions, and a plurality of registers. Each register may be configured to stored data indicative of a source of returned data for previous requests directed to a corresponding partition. Circuitry may be configured to receive a request for data to a given partition. The circuitry may be further configured to read contents of a register corresponding to the given partition, and initiate a speculative read dependent upon the contents of the register.

Abstract: A coaxial cable-connector assembly includes a coaxial cable and a coaxial cable connector. The coaxial cable includes: a central conductor having a connector end; a dielectric layer that overlies the central conductor; and an outer conductor that overlies the dielectric layer having a connector end. The coaxial connector includes: a central conductor extension configured to mate with a mating connector at one end; a first insulative layer interposed between an opposed second end of the central conductor extension and the connector end of the central conductor; an outer conductor extension configured to mate with a mating connector at one end; and a second insulative layer interposed between an opposed second end of the outer conductor extension and the connector end of the outer conductor. This configuration can reduce and/or avoid PIM within the connection of two coaxial connectors.

Abstract: A mixer apparatus (60), such as an integrated circuit (IC) mixer is provided for improving the physical layout of devices containing mixers. The mixer includes a multiplier (62) with an input port (64), an output port (66), a first switchable local oscillator input port (68) and a second switchable local oscillator input port (72). The dual switchable local oscillator ports are located on either side of the mixer, between the input side and the output side. The dual switchable local oscillator ports allow the mixer to provide more flexibility in integrated circuit and printed circuit board design layouts involving mixer apparatus. For example, in dual channel devices, a local oscillator can be coupled to a pair of the mixers using transmission lines that do not have to be routed around the integrated circuit, to a different level of the printed circuit board or underneath one of the mixers.

Abstract: The present invention provides methods and apparatus for calibrating and controlling output power levels in a broadband communication system. The power level of an intermediate frequency (IF) signal may be varied at a first attenuator. The IF signal from the first attenuator may be frequency converted at a mixer to provide a desired transmit frequency converted signal. The power level of the frequency converted signal may be adjusted at a second attenuator. The signal may be sampled after the second attenuator in order to detect its output power level. The detected output power level may be compared with a reference level to obtain a difference signal. The difference signal may be used in a feedback loop to adjust the power level of the signal output from the first attenuator so that a constant output power level is maintained. Methods and apparatus for calibrating output power levels are also provided.