Abstract: An accelerator is accessed. The accelerator includes a systolic array of tiles that include a plurality of rows and a plurality of columns. Each tile in the systolic array of tiles includes one or more multiply-add units. The accelerator includes a row tail associated with each row within the plurality of rows. A first matrix is multiplied by a second matrix in the systolic array. The multiplying is based on a plurality of partial products. A row within the plurality of rows of the systolic array produces one or more partial products within the plurality of partial products. A last tile within the row forwards the one or more partial products to an associated row tail. The one or more partial products that were forwarded are accumulated with one or more previous partial products associated with the row by the associated row tail.

Abstract: An accelerator is accessed. The accelerator includes a weight-stationary systolic array of one or more multiply-accumulate units. The accelerator is coupled to a memory hierarchy and a processor core. The processor core sends a work request to the accelerator. The work request is based on execution of a machine learning model and an activation matrix. In response to the work request, the accelerator loads a weight matrix and the activation matrix. The loading uses the memory hierarchy. The accelerator multiplies the weight matrix by the activation matrix. The multiplication results in an answer matrix. The accelerator stores the answer matrix in the memory hierarchy. The processor core obtains the answer matrix that was stored. The machine learning model is trained. The training produces the weight matrix, which is transposed and saved to the memory hierarchy.

Abstract: Techniques are disclosed for matrix computation within a reconfigurable fabric. A first matrix comprising a multiplier matrix and a second matrix comprising a multiplicand matrix are obtained for processing on a reconfigurable fabric. The first matrix and the second matrix are partitioned into submatrices. The first subset and the second subset are distributed to the plurality of processing elements. The processing elements for the first subset comprise a sequential path of adjacent processing elements within the reconfigurable fabric, where the sequential path forms a closed loop of processing elements starting and ending with a same first processing element. A partial matrix multiplication is performed at each of the subset of the plurality of processing elements. A result is output by recomposing results of the partial matrix multiplication at the subset of the plurality of processing elements that comprise the sequential path into a product matrix.