Patents by Inventor David Staines

David Staines has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10204855
    Abstract: Generally discussed herein are systems and methods that can include a stretchable and bendable device. According to an example a method can include (1) depositing a first elastomer material on a panel, (2) laminating trace material on the elastomer material, (3) processing the trace material to pattern the trace material into one or more traces and one or more bond pads, (4) attaching a die to the one or more bond pads, or (5) depositing a second elastomer material on and around the one or more traces, the bonds pads, and the die to encapsulate the one or more traces and the one or more bond pads in the first and second elastomer materials.
    Type: Grant
    Filed: July 11, 2014
    Date of Patent: February 12, 2019
    Assignee: Intel Corporation
    Inventors: Alejandro Levander, Tatyana Andryushchenko, David Staines, Mauro Kobrinsky, Aleksandar Aleksov, Dilan Seneviratne, Javier Soto Gonzalez, Srinivas Pietambaram, Rafiqul Islam
  • Publication number: 20160284630
    Abstract: Generally discussed herein are systems and methods that can include a stretchable and bendable device. According to an example a method can include (1) depositing a first elastomer material on a panel, (2) laminating trace material on the elastomer material, (3) processing the trace material to pattern the trace material into one or more traces and one or more bond pads, (4) attaching a die to the one or more bond pads, or (5) depositing a second elastomer material on and around the one or more traces, the bonds pads, and the die to encapsulate the one or more traces and the one or more bond pads in the first and second elastomer materials.
    Type: Application
    Filed: July 11, 2014
    Publication date: September 29, 2016
    Inventors: Alejandro Levander, Tatyana Andryushchenko, David Staines, Mauro Kobrinsky, Aleksandar Aleksov, Dilan Seneviratne, Javier Soto Gonzalez, Srinivas Pietambaram, Rafiqul Islam
  • Patent number: 7087538
    Abstract: A three-dimensional integrated circuit formed by applying a material to fill a gap between coupled wafers and slicing the coupled wafers into dice. A method for filling a gap between coupled wafers. Various embodiments include at least one of spinning a coupled wafer pair, drilling a hole into one of the coupled wafers, and using a vacuum to aid in the dispersion of the material.
    Type: Grant
    Filed: August 16, 2004
    Date of Patent: August 8, 2006
    Assignee: Intel Corporation
    Inventors: David Staines, Grant M. Kloster, Shriram Ramanathan
  • Publication number: 20060035476
    Abstract: A three-dimensional integrated circuit formed by applying a material to fill a gap between coupled wafers and slicing the coupled wafers into dice. A method for filling a gap between coupled wafers. Various embodiments include at least one of spinning a coupled wafer pair, drilling a hole into one of the coupled wafers, and using a vacuum to aid in the dispersion of the material.
    Type: Application
    Filed: August 16, 2004
    Publication date: February 16, 2006
    Inventors: David Staines, Grant Kloster, Shriram Ramanathan