Patents by Inventor David Still
David Still has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240087013Abstract: In an example implementation, a method includes receiving, at a computing device, borrower information and requested financing plan information. Likewise, a method includes outputting at least a portion of the received information to a second computing device and, after receiving an indication of a decision denying the requested financing plan, outputting at least a portion of the received information to a computing device associated with a lender and confirming, to a computing device associated with a borrower or a merchant that the information has been sent to the lender.Type: ApplicationFiled: November 17, 2023Publication date: March 14, 2024Inventors: David Zalik, Stefan Woulfin, Kyle Cochran, Matthew Baxter, Chris Parks, Joshua Melcher, Rahul Kulkarni, Guhan Raaghavan, Paul Anderson, Paul Rafferty, Timothy Kaliban, Michael Schuman, William Still
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Patent number: 9646694Abstract: A memory including an array of nvSRAM cells and method of operating the same are provided. Each nvSRAM cell includes a volatile charge storage circuit, and a non-volatile charge storage circuit including exactly one non-volatile memory (NVM) element, a first transistor coupled to the NVM element through which data true is coupled to the volatile charge storage circuit, a second transistor coupled to the NVM element through which a complement of the data is coupled to the volatile charge storage circuit and a third transistor through which the NVM element is coupled to a positive voltage supply line (VCCT). In one embodiment, the first transistor is coupled to a first node of the NVM element, the second transistor is coupled to a second node of the NVM element and the third transistor is coupled between the first node and VCCT. Other embodiments are also disclosed.Type: GrantFiled: October 19, 2015Date of Patent: May 9, 2017Assignee: Cypress Semiconductor CorporationInventors: Joseph S. Tandingan, Jayant Ashokkumar, David Still, Jesse J. Siman
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Patent number: 9607695Abstract: Multi-bit non-volatile random access memory cells are disclosed. A multi-bit non-volatile random access memory cell may include a volatile storage element and a non-volatile storage circuit. The non-volatile storage circuit may include at least one first pass transistor connected to a data true (DT) node of the volatile storage element and at least one second pass transistor connected to a data complement (DC) node of the volatile storage element. The non-volatile storage circuit may also include multiple non-volatile storage elements. Each non-volatile storage element may be configured to be selectively connectable to the DT node of the volatile storage element via the at least one first pass transistor and selectively connectable to the DC node of the volatile storage element via the at least one second pass transistor, allowing the multi-bit non-volatile random access memory cell to store/recall more than one databit per cell.Type: GrantFiled: March 24, 2016Date of Patent: March 28, 2017Assignee: CYPRESS SEMICONDUCTOR CORPORATIONInventors: Joseph Tandingan, Judith Allen, David Still, Jayant Ashokkumar
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Patent number: 9602514Abstract: A non-SDK based scalable technology for integrating multiple mobile device management (MDM) service providers into a content provider platform (or server) is described herein. More specifically, the technology described herein facilitates enterprise mobility management through verification of a managed application associated with an enterprise via the content provider platform. In some embodiments, the content provider platform comprises a cloud-based collaboration and/or storage environment (“cloud-based platform server”) that prevents an unmanaged application from gaining access to the cloud-based collaboration and/or storage server.Type: GrantFiled: June 12, 2015Date of Patent: March 21, 2017Assignee: Box, Inc.Inventors: Sowmiya Chocka Narayanan, Tom Carpel, David Still
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Publication number: 20160111159Abstract: A memory including an array of nvSRAM cells and method of operating the same are provided. Each nvSRAM cell includes a volatile charge storage circuit, and a non-volatile charge storage circuit including exactly one non-volatile memory (NVM) element, a first transistor coupled to the NVM element through which data true is coupled to the volatile charge storage circuit, a second transistor coupled to the NVM element through which a complement of the data is coupled to the volatile charge storage circuit and a third transistor through which the NVM element is coupled to a positive voltage supply line (VCCT). In one embodiment, the first transistor is coupled to a first node of the NVM element, the second transistor is coupled to a second node of the NVM element and the third transistor is coupled between the first node and VCCT. Other embodiments are also disclosed.Type: ApplicationFiled: October 19, 2015Publication date: April 21, 2016Inventors: Joseph S. Tandingan, Jayant Ashokkumar, David Still, Jesse J. Siman
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Publication number: 20150365416Abstract: A non-SDK based scalable technology for integrating multiple mobile device management (MDM) service providers into a content provider platform (or server) is described herein. More specifically, the technology described herein facilitates enterprise mobility management through verification of a managed application associated with an enterprise via the content provider platform. In some embodiments, the content provider platform comprises a cloud-based collaboration and/or storage environment (“cloud-based platform server”) that prevents an unmanaged application from gaining access to the cloud-based collaboration and/or storage server.Type: ApplicationFiled: June 12, 2015Publication date: December 17, 2015Inventors: Sowmiya Chocka Narayanan, Tom Carpel, David Still
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Patent number: 9098270Abstract: A device is configured to establish first and second device power domains. Isolation circuits isolate signals from passing between circuits in the first device power domain and circuits in the second device power domain. During a transition between power domains, an n-bit value is stored in a particular storage location, and compared to a particular n-bit value. Isolation between the first and second device power domains is removed when the n-bit value stored in the particular storage location matches the particular n-bit value.Type: GrantFiled: December 29, 2011Date of Patent: August 4, 2015Assignee: CYPRESS SEMICONDUCTOR CORPORATIONInventors: Srikanth—Reddy Tiyyagura, David Still
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Patent number: 8861271Abstract: A device can include a plurality of memory cells, each memory cell including at least one latch circuit coupled between two data nodes, a first nonvolatile section coupled to a first data node, and a second nonvolatile section coupled to a second data node; and each nonvolatile section including at least one switch element in series with a programmable nonvolatile element, the switch element configured to couple the nonvolatile element to the corresponding data node during a high reliability read operation of the memory cell.Type: GrantFiled: June 28, 2012Date of Patent: October 14, 2014Assignee: Cypress Semiconductor CorporationInventors: Suhail Zain, Helmut Puchner, Walt Anderson, David Still
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Patent number: 8817536Abstract: A memory circuit includes a controlled current source coupled to an input to a nonvolatile cell, and a second controlled current source coupled to a volatile cell, the volatile cell coupled to receive current from the controlled current source via the nonvolatile cell.Type: GrantFiled: December 31, 2007Date of Patent: August 26, 2014Assignee: Cypress Semiconductor CorporationInventors: Andreas Scade, David Still, James Allen, Jay Ashokkumar, Jaskarn Singh Johal
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Patent number: 8559262Abstract: A verification circuit for a capacitor power supply measures at least two voltages across the terminals of the capacitor at two points in time, the two points in time defining a time interval dT. A change in voltage dV over the time interval dT is determined. An operation powered by the capacitor is initiated, or not, by deriving from the time interval dT and/or the voltage change dV, a total required time or a total required voltage for completing the operation, and comparing the total required time or total required voltage to a pre-determined necessary total time or predetermined necessary total voltage, respectively (a “time interval test”).Type: GrantFiled: December 29, 2011Date of Patent: October 15, 2013Assignee: Cypress Semiconductor CorporationInventors: Srikanth Reddy Tiyyagura, David Still, Jayant Ashokkumar, David G Wright
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Publication number: 20130170312Abstract: A verification circuit for a capacitor power supply measures at least two voltages across the terminals of the capacitor at two points in time, the two points in time defining a time interval dT. A change in voltage dV over the time interval dT is determined. An operation powered by the capacitor is initiated, or not, by deriving from the time interval dT and/or the voltage change dV, a total required time or a total required voltage for completing the operation, and comparing the total required time or total required voltage to a pre-determined necessary total time or predetermined necessary total voltage, respectively (a “time interval test”).Type: ApplicationFiled: December 29, 2011Publication date: July 4, 2013Applicant: Cypress Semiconductor CorporationInventors: Srikanth _ Reddy Tiyyagura, David Wright, David Still, Jayant Ashokkumar
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Publication number: 20080232167Abstract: A memory circuit includes a controlled current source coupled to an input to a nonvolatile cell, and a second controlled current source coupled to a volatile cell, the volatile cell coupled to receive current from the controlled current source via the nonvolatile cell.Type: ApplicationFiled: December 31, 2007Publication date: September 25, 2008Applicant: SimtekInventors: Andreas Scade, David Still, James Allen, Jay Ashokkumar, Johal Jas
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Publication number: 20070174491Abstract: Techniques for redirecting a client request. The client request is received at a first server. The first server forwards the client request to a second server. The first server receives a result message from the second server. The first server identifies, in the result message, references to resources of the second server. The first server replaces, in the result message, all references to resources of the second server with translated references that reference the first server without replacing references to resources of any other entity other than the second server. The first server sends the translated references to the client as a response to the client request.Type: ApplicationFiled: March 30, 2007Publication date: July 26, 2007Inventors: David Still, John Calabrese