Patents by Inventor David Straight

David Straight has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12497194
    Abstract: An aircraft monitoring system includes an avionics communication bus structure, at least one network member user device that transmits a broadcast message onto the avionics communication bus structure, and at least one non-member user device that receives the broadcast message transmitted onto the avionics communication bus, processes the received broadcast message, and transmits output data to a monitoring device. The at least one non-member user device includes a bus interface, and a field programmable gate array (FPGA) that communicates with the bus interface. The FPGA is programmed to function as a main finite state machine that processes the broadcast message from the bus interface, and a transfer finite state machine that generates output data and transfers the generated output data to an output processor that communicates with the monitoring device. The monitoring device outputs a monitored data report.
    Type: Grant
    Filed: September 29, 2023
    Date of Patent: December 16, 2025
    Assignee: General Electric Company
    Inventors: David J. Steffler, Jonathan P. VanStensel, David Straight, Brian R. Johnson, Juan Carlos Arenas Mena, Laura Rodriguez
  • Publication number: 20250108936
    Abstract: An aircraft monitoring system includes an avionics communication bus structure, at least one network member user device that transmits a broadcast message onto the avionics communication bus structure, and at least one non-member user device that receives the broadcast message transmitted onto the avionics communication bus, processes the received broadcast message, and transmits output data to a monitoring device. The at least one non-member user device includes a bus interface, and a field programmable gate array (FPGA) that communicates with the bus interface. The FPGA is programmed to function as a main finite state machine that processes the broadcast message from the bus interface, and a transfer finite state machine that generates output data and transfers the generated output data to an output processor that communicates with the monitoring device. The monitoring device outputs a monitored data report.
    Type: Application
    Filed: September 29, 2023
    Publication date: April 3, 2025
    Inventors: David J. Steffler, Jonathan P. VanStensel, David Straight, Brian R. Johnson, Juan Carlos Arenas Mena, Laura Rodriguez
  • Publication number: 20090119720
    Abstract: The present rear seat entertainment system provides a second display and interface in the front section of a motor vehicle for control of a media player with a rear mounted first display. The second display shows still video images (or screen shots) from the media player for real time updates on the status of the first display in the rear section of the vehicle according to adjustments made by the second user interface. The entertainment system includes a portable controller with the second display incorporated therein.
    Type: Application
    Filed: September 7, 2006
    Publication date: May 7, 2009
    Inventors: Eric S Deuel, Peter W. Mokris, Steve Schultz, Lance E. Tinder, Douglas W. Klamer, Loren D. Vredevoogd, David Straight