Patents by Inventor David Sunderland

David Sunderland has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Encoding polygon data for fast retrieval and rendering
    Patent number: 9721363
    Abstract: An indexed list of vertices is generated to represent a polygon. The indexed list is ordered so as to define one or more boundaries of a polygon, where each element in the indexed list of vertices specifies respective coordinates in an at least two-dimensional space. A description of several component shapes that make up the polygon is generated, where the description includes indices into the indexed list of vertices. The indexed list of vertices and the description of the component shapes are provided to a computing device for rendering the polygon.
    Type: Grant
    Filed: May 19, 2014
    Date of Patent: August 1, 2017
    Assignee: GOOGLE INC.
    Inventors: Brian Williams, Harlan Hile, Hannah Tang, Andrew Miller, David Sunderland
  • ENCODING POLYGON DATA FOR FAST RETRIEVAL AND RENDERING
    Publication number: 20150332487
    Abstract: An indexed list of vertices is generated to represent a polygon. The indexed list is ordered so as to define one or more boundaries of a polygon, where each element in the indexed list of vertices specifies respective coordinates in an at least two-dimensional space. A description of several component shapes that make up the polygon is generated, where the description includes indices into the indexed list of vertices. The indexed list of vertices and the description of the component shapes are provided to a computing device for rendering the polygon.
    Type: Application
    Filed: May 19, 2014
    Publication date: November 19, 2015
    Applicant: GOOGLE INC.
    Inventors: Brian Williams, Harlan Hile, Hannah Tang, Andrew Miller, David Sunderland
  • Method for making heterojunction bipolar transistor with self-aligned retrograde emitter profile
    Patent number: 5656514
    Abstract: A high gain, high frequency transistor is formed having a combination of a moderately doped retrograde emitter and a collector which is formed by self-aligned implantation through an emitter opening window. This combination allows continued base width scaling and ensures high current capability yet limits the electric field at the emitter-base junction, particularly near the base contacts, in order to reduce leakage and capacitance and to enhance breakdown voltage. Cut-off frequencies on the order of 100 GHz can thus be obtained in the performance of a transistor with a 30 nm base width in a SiGe device.
    Type: Grant
    Filed: November 22, 1994
    Date of Patent: August 12, 1997
    Assignee: International Business Machines Corporation
    Inventors: David Ahlgren, Jack Chu, Martin Revitz, Paul Ronsheim, Mary Saccamango, David Sunderland
  • Image reversal process for self-aligned implants in planar epitaxial-base bipolar transistors
    Patent number: 5266505
    Abstract: An image reversal process for self-aligned implants in which a mask opening and plug in the opening are used to enable one implant in the mask opening, another self-aligned implant in the region surrounding the opening, and a self-aligned electrode to be formed in the opening.
    Type: Grant
    Filed: December 22, 1992
    Date of Patent: November 30, 1993
    Assignee: International Business Machines Corporation
    Inventors: David C. Ahlgren, Shao-Fu S. Chu, Mary J. Saccamango, David A. Sunderland, Tze-Chiang Chen