Abstract: A method for converting power includes charging an inductor by coupling the inductor to a voltage source for a predetermined amount of time. Thereafter, the inductor is discharged by coupling the inductor to a ground until the current flowing through the inductor equals zero. A method for detecting a zero current flowing through the inductor includes coupling the inductor to a transistor and comparing the output of that transistor to a transistor coupled to ground.

Abstract: A method, apparatus, and system for providing operating power and transient suppression power to a microelectronic device are disclosed. The system includes a primary regulator to supply nominal operating power and to respond to relatively slow transient events and a transient suppression regulator to respond to fast transient power events. The system also includes a sense circuit to detect when a transient event occurs and to send a signal to the transient suppression regulator to supply or sink current to the load in response to a sensed transient power event.

Abstract: A method for converting power includes charging an inductor by coupling the inductor to a voltage source for a predetermined amount of time. Thereafter, the inductor is discharged by coupling the inductor to a ground until the current flowing through the inductor equals zero. A method for detecting a zero current flowing through the inductor includes coupling the inductor to a transistor and comparing the output of that transistor to a transistor coupled to ground.

Abstract: A highly phased power regulation (converter) system having an improved control feature is provided. A controller, such as a digital signal processor or microprocessor, receives digital information from a plurality of power conversion blocks and transmits control commands in response to the information. The controller is able to change the mode of operation of the system and/or re-phase the power blocks to accommodate a dynamic load requirement, occasions of high transient response or detection of a fault. In one embodiment, a microprocessor receives digital information and converted power from one or more power blocks. In this manner, the microprocessor is able to receive feedback on its own operation. The controller is also able to anticipate and predict conditions by analyzing precursor data. In this manner, the controller is able to modify the system as needed in anticipation of the forthcoming event.

Abstract: A system and method for current sensing which is substantially consistent over device, temperature, and process variations is provided. A current sensing system includes a first switch coupled to one or more variable resistive elements. The resistive elements being configured to scale down the voltage across the first switch which is provided to an input of an amplifier. The amplifier is coupled to the resistive elements and the second switch and is configured to sense the voltage across the first switch, and force the voltage across the second switch to be equal to the first switch scaled down voltage. Thus, a current of known proportion can be provided at the output of the amplifier. A driver and timing circuit may be provided to prevent the amplifier from providing an excessive slewing of current during the off period.

Abstract: A method, apparatus, and system for providing operating power and transient suppression power to a microelectronic device are disclosed. The system includes a primary regulator to supply nominal operating power and to respond to relatively slow transient events and a transient suppression regulator to respond to fast transient power events. The system also includes a sense circuit to detect when a transient event occurs and to send a signal to the transient suppression regulator to supply or sink current to the load in response to a sensed transient power event.

Abstract: The present invention is directed to a circuit that is configured to detect a zero current condition at a certain point. The circuit includes a current mirror coupled to two transistors, where the first transistor is coupled to ground and the second transistor is coupled to the point being sensed. The outputs of both the first transistor and the second transistor are each coupled to an input of a comparator. The comparator is configured to determine when an equal voltage condition is present at the two inputs, which signifies a zero-current condition. Such a zero current detector can be used in a buck regulator to prevent a current flow from load to ground and attendant inefficiencies that result. An alternative embodiment involves the use of a controller to sense three different voltages to determine the state of the switches.

Abstract: A system and method for current sensing which is substantially consistent over device, temperature, and process variations is provided. A current sensing system includes a first switch coupled to one or more variable resistive elements. The resistive elements being configured to scale down the voltage across the first switch which is provided to an input of an amplifier. The amplifier is coupled to the resistive elements and the second switch and is configured to sense the voltage across the first switch, and force the voltage across the second switch to be equal to the first switch scaled down voltage. Thus, a current of known proportion can be provided at the output of the amplifier. A driver and timing circuit may be provided to prevent the amplifier from providing an excessive slewing of current during the off period.

Abstract: A highly phased power regulation (converter) system having an improved control feature is provided. A controller, such as a digital signal processor or microprocessor, receives digital information from a plurality of power conversion blocks and transmits control commands in response to the information. The controller is able to change the mode of operation of the system and/or re-phase the power blocks to accommodate a dynamic load requirement, occasions of high transient response or detection of a fault. In one embodiment, a microprocessor receives digital information and converted power from one or more power blocks. In this manner, the microprocessor is able to receive feedback on its own operation. The controller is also able to anticipate and predict conditions by analyzing precursor data. In this manner, the controller is able to modify the system as needed in anticipation of the forthcoming event.

Abstract: The present invention is directed to a circuit that is configured to detect a zero current condition at a certain point. The circuit includes a current mirror coupled to two transistors, where the first transistor is coupled to ground and the second transistor is coupled to the point being sensed. The outputs of both the first transistor and the second transistor are each coupled to an input of a comparator. The comparator is configured to determine when an equal voltage condition is present at the two inputs, which signifies a zero-current condition. Such a zero current detector can be used in a buck regulator to prevent a current flow from load to ground and attendant inefficiencies that result. An alternative embodiment involves the use of a controller to sense three different voltages to determine the state of the switches.

Abstract: A capacitor array for a Successive Approximation Register (SAR) based Analog to Digital (A/D) converter. The capacitor array is a capacitive ladder comprising a plurality of capacitive branches. Each capacitive branch is individually coupled to a separate bit of a driver circuit. Each of the plurality of capacitive branches drives an approximately same capacitive value while generating a binary weighted output voltage.

Abstract: A fast start-up circuit for use in integrated circuits where there are internal nodes of reference circuits that need to be charged to a predetermined voltage level at a quicker rate than that delivered by the typical ramping up of supply power. The circuit a current driven approach, which is unique from the voltage driven approaches found in the prior art. The circuit is comprised of a high gain reference circuit and a current generator. The reference circuit is comprised of a bias generator and a high gain amplifier. The invention is characterized by a current generator which is capable of rapidly injecting relatively high levels of current into the reference circuit or sinking relatively high levels of current from the reference circuit or both. The invention is further characterized by a current driven feedback loop which deactivates the current generator once start-up is achieved and the high gain reference circuit approaches the quiescent point.

Abstract: A precision relaxation oscillator with temperature compensation produces a stable clock frequency over wide variations of ambient temperature. The invention has a oscillation generator and two independent current generators. The outputs of the two programmable, independent current generators are combined to provide a capacitor charging current which is independent of temperature. The precision relaxation oscillator with temperature compensation is implemented on a single, monolithic integrated circuit.

Abstract: A driver circuit for low voltage operation of a Successive Approximation Register (SAR) based Analog/Digital (A/D) converter is disclosed. The driver circuit has a plurality of cells wherein each cell is used for driving an individual column of a capacitor array. A switching circuit is held within each of the plurality of cells. The switching circuit is used for outputting one of a high voltage level V.sub.H or a low voltage level V.sub.L to an individual column of the capacitor array while driving no DC current. The switching circuit is comprised of a pair of fully differential pass gates. The pass gates are driven by circuitry referenced off of the supply voltage V.sub.dd of the A/D converter integrated circuit and ground. Because of this, each pass gate may operate off of any voltage within the V.sub.dd to ground range. Thus, the switching circuit allows for low voltage operation with a wider operating range.

Abstract: A geometrical layout technique for an individual circular capacitor in a semiconductor device. Circular capacitors reduce the detrimental effects of (1) corner etching, (2) peripheral capacitance, (3) capacitor to capacitor coupling, and (4) electric field anomalies and result in superior capacitor matching. The circular capacitor is comprised of a circular bottom plate made of a conducting material, a circular dielectric material coupled to the bottom plate and a circular top plate made of a conducting material.The circular capacitors may be arranged as an array in either a rectangular lattice layout or a diagonal lattice layout. These lattice layouts take advantage of the elimination or reduction of the problems encountered in the prior art such as corner etching, peripheral capacitance, capacitor to capacitor coupling and electric field anomalies.