Patents by Inventor David Swafford

David Swafford has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12047258
    Abstract: Network devices that (a) test that GPS-clock enabled network devices have synchronized clocks, (b) identify non-GPS-clock enabled network devices with symmetric latencies as likely to be synchronized to GPS-clock enabled neighbor devices, (c) determine clock skews of remaining network devices not identified in (a) or (b) against the network devices identified in (a) and (b), and re-evaluate latencies of the GPS-clock enabled network devices, the non-GPS-clock enabled network devices, and the remaining devices based on the results of (a)-(c).
    Type: Grant
    Filed: August 17, 2022
    Date of Patent: July 23, 2024
    Assignee: Neoatomic LLC
    Inventors: Steve Shaw, Jordan Whited, David Swafford, Ben Marx
  • Publication number: 20230077440
    Abstract: An overlay network system includes multiple point-of-presence (POP) devices each including a path finding component and corresponding telemetry component, agent component, and routing daemon. The telemetry component generates latency measurements for the POP on which it is disposed. A centralized billboard service provides border gateway protocol (BGP) announcements and point-of-presence (POP) peering decisions to each of the agent components. On each of the POPs, the path finding component and corresponding telemetry component, agent component, and routing daemon cooperate to transform the BGP announcements, peering decisions, and latency measurements into routing tables and link selections for packet streams routed through the POPs.
    Type: Application
    Filed: August 17, 2022
    Publication date: March 16, 2023
    Applicant: Subspace Alpha (assignment for the benefit of creditors), LLC
    Inventors: Steve Shaw, Jordan Whited, Brandon Choe, Charlie Frederick Hulcher, David Swafford, Ben Marx
  • Publication number: 20230076025
    Abstract: Network devices that (a) test that GPS-clock enabled network devices have synchronized clocks, (b) identify non-GPS-clock enabled network devices with symmetric latencies as likely to be synchronized to GPS-clock enabled neighbor devices, (c) determine clock skews of remaining network devices not identified in (a) or (b) against the network devices identified in (a) and (b), and re-evaluate latencies of the GPS-clock enabled network devices, the non-GPS-clock enabled network devices, and the remaining devices based on the results of (a)-(c).
    Type: Application
    Filed: August 17, 2022
    Publication date: March 9, 2023
    Applicant: Subspace Alpha (assignment for the benefit of creditors), LLC
    Inventors: Steve Shaw, Jordan Whited, David Swafford, Ben Marx
  • Publication number: 20230075230
    Abstract: Systems including a telemetry service, a graph service coupled to transform outputs of the telemetry service into path routes through an overlay network, a billboard service configured to transform the path routes into border gateway protocol (BGP) announcements and point-of-presence (POP) peering decisions, multiple agent components, and multiple routing daemons, each disposed on a different POP of the overlay network along with a corresponding one of the agent components. The daemons receive BGP announcements and peering decisions from the billboard service via the corresponding agent component and transform the BGP announcements and peering decisions into routing tables for the POPs.
    Type: Application
    Filed: August 17, 2022
    Publication date: March 9, 2023
    Applicant: Subspace Alpha (assignment for the benefit of creditors), LLC
    Inventors: Steve Shaw, Charlie Frederick Hulcher, David Swafford, Jordan Whited, Ben Marx, Brandon Choe
  • Patent number: 9439307
    Abstract: An assembly suitable for housing electronic components can include a top shield and a bottom shield, the bottom shield having a conductive outer cover, a wall section, and a laminating portion between the conductive outer cover and the wall section. The laminating portion may include laminating material. A printed circuit board (PCB) may be positioned between the top shield and the bottom shield.
    Type: Grant
    Filed: May 23, 2014
    Date of Patent: September 6, 2016
    Assignee: TEKTRONIX, INC.
    Inventors: M. David Swafford, Marcus K. Da Silva, Steve U. Reinhold
  • Publication number: 20150223357
    Abstract: An assembly suitable for housing electronic components can include a top shield and a bottom shield, the bottom shield having a conductive outer cover, a wall section, and a laminating portion between the conductive outer cover and the wall section. The laminating portion may include laminating material. A printed circuit board (PCB) may be positioned between the top shield and the bottom shield.
    Type: Application
    Filed: May 23, 2014
    Publication date: August 6, 2015
    Applicant: Tektronix, Inc.
    Inventors: M. David Swafford, Marcus K. Da Silva, Steve U. Reinhold
  • Patent number: 6402565
    Abstract: An electronic interconnect assembly has a high speed coaxial interconnect for a coaxial transmission line having a central signal conductor and a surrounding shield conductor. The coaxial interconnect has a male side and a female side, with the female side including a shield sleeve having a chamber that receives a male shield contact on the male side. The shield sleeve has a contact with a compliant portion that flexibly grips the male shield contact. A mechanical alignment facility includes a closely mating pocket and body, each attached to a respective male or female side of the interconnect. Additional data and power connectors may be included with the pocket and body.
    Type: Grant
    Filed: November 17, 2000
    Date of Patent: June 11, 2002
    Assignee: Tektronix, Inc.
    Inventors: William R. Pooley, Daniel J. Ayres, M. David Swafford, William Q. Law, Michael L. Kyle, J. Steven Lyford, Jonathan E. Myers, Mark W. Nightingale, Jerry R. Shane
  • Patent number: 6402549
    Abstract: An adapter for an electronic interconnect assembly has a high speed coaxial interconnect for a coaxial transmission line having a central signal conductor and a surrounding shield conductor. The coaxial interconnect has a male side and a female side, with the female side including a shield sleeve having a chamber that receives a male shield contact on the male side. The shield sleeve has a contact with a compliant portion that flexibly grips the male shield contact. A mechanical alignment facility portion selected from a pair of alignment facility portions including a closely mating pocket and body has one of the male side or female side of the coaxial interconnect. An electrical signal connector is electrically coupled to the selected male or female of the coaxial interconnect.
    Type: Grant
    Filed: November 17, 2000
    Date of Patent: June 11, 2002
    Assignee: Tektronix, Inc.
    Inventors: Daniel J. Ayres, William Q. Law, M. David Swafford, William R. Pooley
  • Patent number: 6383031
    Abstract: A keyed electronic interconnect assembly has a high speed coaxial interconnect for a coaxial transmission line having a central signal conductor and a surrounding shield conductor. The coaxial interconnect has a male side and a female side, with the female side including a shield sleeve having a chamber that receives a male shield contact on the male side. The shield sleeve has a contact with a compliant portion that flexibly grips the male shield contact. A mechanical alignment facility includes a closely mating pocket and body, each attached to a respective male or female side of the interconnect. A keying arrangement having protrusion elements and aperture elements are included in the pocket and body to provide selective mating of the pocket and body. Additional data connectors may be included with the pocket and body.
    Type: Grant
    Filed: November 17, 2000
    Date of Patent: May 7, 2002
    Assignee: Tektronix, Inc.
    Inventors: William Q. Law, William R. Pooley, M. David Swafford
  • Patent number: 6040701
    Abstract: An apparatus for providing a probing interface for a circuit under test exhibits a relatively narrow profile and a vertical orientation so that it does not block access to connectors in adjacent slots. The vertical orientation is made possible by the use of a circuit material comprising alternate sections of flexible material and rigid material. Advantageously, the signal lines between the circuit card under test and its motherboard are direct and relatively short, and the probing connection points are isolated from the direct signal lines by a plurality of isolation resistors.
    Type: Grant
    Filed: June 17, 1998
    Date of Patent: March 21, 2000
    Assignee: Tektronix, Inc.
    Inventors: M. David Swafford, James M. Fenton