Abstract: A method performed by a controller comprising assigning a first status indicator to entries in a first address line in a volatile memory belonging to a first region of an LUT stored in a non-volatile memory, and a second status indicator to entries in the first address line in the volatile memory belonging to a second region of the LUT, setting either the first or second status indicator to a dirty status based on whether a cache updated entry at an address m in the volatile memory belongs to the first or second region of the LUT, and writing, based on the dirty status of the first and second status indicator at the address m, all entries in the volatile memory associated with the first region or the second region containing the updated entry to the non-volatile memory.

Abstract: An apparatus for activating chambers of downhole hydraulic screens. The apparatus comprises an outer sleeve, an inner sleeve, and a flow path. The outer sleeve is coupled to one hydraulic screen on one end and another hydraulic screen on another end. The inner sleeve couples to base pipe at both ends. The flow path is an annulus defined between the outer diameter of the inner sleeve and the inner diameter of the outer sleeve. Hydraulic seals are formed at the interfaces between the inner sleeve and base pipe and the outer sleeve and hydraulic screens. In practice, the assembled apparatus and hydraulic screens are ran downhole to a production zone using production tubing and a running tool. Fluid from the surface is pumped into the production tubing, diverted therefrom, and into chambers of the hydraulic screens using the flow path to conduct fluid between the hydraulic screens.

Abstract: A method performed by a controller comprising assigning a first status indicator to entries in a first address line in a volatile memory belonging to a first region of an LUT stored in a non-volatile memory, and a second status indicator to entries in the first address line in the volatile memory belonging to a second region of the LUT, setting either the first or second status indicator to a dirty status based on whether a cache updated entry at an address m in the volatile memory belongs to the first or second region of the LUT, and writing, based on the dirty status of the first and second status indicator at the address m, all entries in the volatile memory associated with the first region or the second region containing the updated entry to the non-volatile memory.

Abstract: Provided, in one aspect, is an anchor for use with a downhole tool in a wellbore. The anchor, according to this aspect, may include a base pipe; and one or more expandable chambers positioned radially about the base pipe. The one or more expandable chambers may, in some aspects, be configured to move from a first collapsed state to a second activated state; and the one or more expandable chambers may be operable to handle at least 20.7 Bar of internal pressure in the second activated state to engage a wall of a wellbore.

Abstract: An adjustable flow control device. In one aspect, the flow control device comprises a base pipe having one or more openings extending from an exterior to an interior of the base pipe; and a movable sleeve positioned along the interior of the base pipe, the movable sleeve having one or more associated openings extending from an exterior to an interior of the movable sleeve, and configured to rotate to a first position that aligns a first of the base pipe openings with a first of the movable sleeve openings.

Abstract: A method performed by a controller comprising assigning a first status indicator to entries in a first address line in a volatile memory belonging to a first region of an LUT stored in a non-volatile memory, and a second status indicator to entries in the first address line in the volatile memory belonging to a second region of the LUT, setting either the first or second status indicator to a dirty status based on whether a cache updated entry at an address m in the volatile memory belongs to the first or second region of the LUT, and writing, based on the dirty status of the first and second status indicator at the address m, all entries in the volatile memory associated with the first region or the second region containing the updated entry to the non-volatile memory.

Abstract: A method performed by a controller comprising assigning a first status indicator to entries in a first address line in a volatile memory belonging to a first region of an LUT stored in a non-volatile memory, and a second status indicator to entries in the first address line in the volatile memory belonging to a second region of the LUT, setting either the first or second status indicator to a dirty status based on whether a cache updated entry at an address m in the volatile memory belongs to the first or second region of the LUT, and writing, based on the dirty status of the first and second status indicator at the address m, all entries in the volatile memory associated with the first region or the second region containing the updated entry to the non-volatile memory.

Abstract: Disclosed herein are embodiments of a flow control device (FCD) module for use with hydraulic screens. In one embodiment, the FCD module comprises a base pipe having a port coupling an exterior of the base pipe and an interior of the base pipe; an FCD unit coupled to the base pipe about the port and configured to control production fluid from an oil and gas formation to the interior of the base pipe; one or more separate isolated activation channels extending along at least a portion of the base pipe, the one or more separate isolated activation channels configured to fluidly couple with one or more hydraulic activation chambers of a screen subassembly; and one or more covers surrounding the base pipe about the FCD unit, the one or more covers forming a production fluid channel between the screen subassembly and the FCD unit.

Abstract: An apparatus for activating chambers of downhole hydraulic screens. The apparatus comprises an outer sleeve, an inner sleeve, and a flow path. The outer sleeve is coupled to one hydraulic screen on one end and another hydraulic screen on another end. The inner sleeve couples to base pipe at both ends. The flow path is an annulus defined between the outer diameter of the inner sleeve and the inner diameter of the outer sleeve. Hydraulic seals are formed at the interfaces between the inner sleeve and base pipe and the outer sleeve and hydraulic screens. In practice, the assembled apparatus and hydraulic screens are ran downhole to a production zone using production tubing and a running tool. Fluid from the surface is pumped into the production tubing, diverted therefrom, and into chambers of the hydraulic screens using the flow path to conduct fluid between the hydraulic screens.

Abstract: Disclosed herein are embodiments of a flow control device (FCD) module for use with hydraulic screens. In one embodiment, the FCD module comprises a base pipe having a port coupling an exterior of the base pipe and an interior of the base pipe; an FCD unit coupled to the base pipe about the port and configured to control production fluid from an oil and gas formation to the interior of the base pipe; one or more separate isolated activation channels extending along at least a portion of the base pipe, the one or more separate isolated activation channels configured to fluidly couple with one or more hydraulic activation chambers of a screen subassembly; and one or more covers surrounding the base pipe about the FCD unit, the one or more covers forming a production fluid channel between the screen subassembly and the FCD unit.

Abstract: Disclosed herein are embodiments of an adjustable flow control device. In one embodiment, the flow control device comprises a base pipe having one or more openings extending from an exterior to an interior of the base pipe; and a movable sleeve positioned along the interior of the base pipe, the movable sleeve having one or more associated openings extending from an exterior to an interior of the movable sleeve, and configured to rotate to a first position that aligns a first of the base pipe openings with a first of the movable sleeve openings.

Abstract: There is provided a method of providing adjusted LLR values of a plurality of bits in a codeword to an LDPC decoder, the plurality of bits representing a plurality of charge states of a plurality of memory cells of a non-volatile memory. The method comprises storing in a non-volatile memory controller associated with the non-volatile memory LLR values of the plurality of bits. The controller then determines a plurality of levels of the charge states represented by the plurality of bits. The controller then generates, by a distribution processor, distributions of a population of the plurality of bits in the codeword at each of the plurality of levels at a first and a second time after the first time. The controller then generates the adjusted LLR values based on a comparison between the first and second distributions, and then decodes the codeword according to the adjusted LLR values.

Abstract: There is provided a method of providing adjusted LLR values of a plurality of bits in a codeword to an LDPC decoder, the plurality of bits representing a plurality of charge states of a plurality of memory cells of a non-volatile memory. The method comprises storing in a non-volatile memory controller associated with the non-volatile memory LLR values of the plurality of bits. The controller then determines a plurality of levels of the charge states represented by the plurality of bits. The controller then generates, by a distribution processor, distributions of a population of the plurality of bits in the codeword at each of the plurality of levels at a first and a second time after the first time. The controller then generates the adjusted LLR values based on a comparison between the first and second distributions, and then decodes the codeword according to the adjusted LLR values.

Abstract: A system for an Error Correction Code (“ECC”) decoder includes a first decoder and a second decoder. The first decoder is configured to determine a first estimated number of errors in encoded data received at the first decoder and to compare the first estimated number of errors to a first threshold and a second threshold. The second decoder is configured to receive the encoded data when the first estimated number of errors is below the first threshold and is above a second threshold. When the first estimated number of errors is above the first threshold, the first decoder passes the encoded data out of the ECC. The first decoder has a lower power consumption than the second decoder.

Abstract: A solid state storage device comprises a non-volatile memory controller configured to store data in a non-volatile memory, wherein the stored data is encoded using a first error-correcting code and a second Low Density Parity Check (LDPC) code. The non-volatile memory controller includes a hard-decision LDPC decoder to decode encoded data received from the non-volatile memory and provide a decoded data output. The hard-decision LDPC decoder selects a voting scheme at each iteration in a sequence of iterations of decoding to determine when to implement bit flipping at a variable node amongst a plurality of check nodes, each of the plurality of check nodes connected to a plurality of variable nodes.

Abstract: A method of providing, by a controller, a log likelihood ratio (LLR) to a low-density parity check (LDPC) decoder, the method comprising storing, in a non-volatile memory controller, a look-up table for storing LLR values of at least one bit representing a charge state of a cell of the plurality of cells in the memory. The controller determines a cell charge state of the target cell, calculates a value representative of the difference in charge states of the target cell and at least one of a plurality of neighboring cells. The controller compares the calculated value with at least one predetermined threshold value, and sets at least one address bit of an address to the look-up table if the calculated value exceeds the at least one threshold value. The controller extracts a new LLR value from the look-up table, and provides the new LLR value to the LDPC decoder.

Abstract: A solid state storage device comprises a non-volatile memory controller configured to store data in a non-volatile memory, wherein the stored data is encoded using a first error-correcting code and a second Low Density Parity Check (LDPC) code. The non-volatile memory controller includes a hard-decision LDPC decoder to decode encoded data received from the non-volatile memory and provide a decoded data output. The hard-decision LDPC decoder selects a voting scheme at each iteration in a sequence of iterations of decoding to determine when to implement bit flipping at a variable node amongst a plurality of check nodes, each of the plurality of check nodes connected to a plurality of variable nodes.

Abstract: A method of providing, by a controller, a log likelihood ratio (LLR) to a low-density parity check (LDPC) decoder, the method comprising storing, in a non-volatile memory controller, a look-up table for storing LLR values of at least one bit representing a charge state of a cell of the plurality of cells in the memory. The controller determines a cell charge state of the target cell, calculates a value representative of the difference in charge states of the target cell and at least one of a plurality of neighboring cells. The controller compares the calculated value with at least one predetermined threshold value, and sets at least one address bit of an address to the look-up table if the calculated value exceeds the at least one threshold value. The controller extracts a new LLR value from the look-up table, and provides the new LLR value to the LDPC decoder.

Abstract: A solid state storage device, comprising a non-volatile memory configured to store data encoded into a plurality of encoded data groups, each encoded data group of the plurality being encoded using a BCH or Hamming parity scheme, the plurality of encoded data groups being collectively further encoded by a parity scheme using a Low Density Parity Check (LDPC) code, a non-volatile memory controller communicatively coupled to the non-volatile memory and configured to access the plurality of encoded data groups, a first decoder configured to first decode the plurality of encoded data groups by hard-decision decoding the parity in each encoded data group, and a second decoder commutatively coupled to the first decoder and configured to determine the data groups decoded by the first decoder that contain errors, and to decode the parity of the data groups that contain errors using likelihood-of-errors information that is input to the second decoder.

Abstract: A system for an Error Correction Code (“ECC”) decoder includes a first decoder and a second decoder. The first decoder is configured to determine a first estimated number of errors in encoded data received at the first decoder and to compare the first estimated number of errors to a first threshold and a second threshold. The second decoder is configured to receive the encoded data when the first estimated number of errors is below the first threshold and is above a second threshold. When the first estimated number of errors is above the first threshold, the first decoder passes the encoded data out of the ECC. The first decoder has a lower power consumption than the second decoder.