Patents by Inventor DAVID T. BERNARD

DAVID T. BERNARD has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • EJECTION HEAD NOZZLE FLOODING CONTROL
    Publication number: 20250065624
    Abstract: A nozzle plate configured for a fluid ejection head, a fluid ejection head containing the nozzle plate and a method for modifying a nozzle plate to reduce fluid flooding thereon. The nozzle plate includes a plurality of nozzle holes therein attached to a flow feature layer on a semiconductor substrate, and includes a first hydrophobic region surrounding each of the plurality of nozzle holes, whereby the first hydrophobic region is configured to reduce flooding of the nozzle plate.
    Type: Application
    Filed: August 22, 2023
    Publication date: February 27, 2025
    Applicant: Funai Electric Co., Ltd.
    Inventors: David L. Bernard, Adam D. Carrithers, Brian T. Jones, Amber Taraska
  • Techniques for power supply topologies with capacitance management to reduce power loss associated with charging and discharging when cycling between power states
    Patent number: 9882472
    Abstract: In at least one embodiment there is provided a method for managing bulk capacitance of a power supply system. The method includes precharging first and second bulk capacitors of the power supply system to approximately a first output voltage level and a second output voltage level, respectively; receiving a first command signal to generate, by the power supply, the first output voltage level; coupling the first bulk capacitance to load circuitry coupled to the power supply; receiving a second command signal to generate, by the power supply, the second output voltage level; and coupling the second bulk capacitance to the load circuitry coupled to the power supply.
    Type: Grant
    Filed: September 25, 2014
    Date of Patent: January 30, 2018
    Assignee: INTEL CORPORATION
    Inventors: Nicholas P. Cowley, Ruchir Saraswat, Richard J. Goldman, David T. Bernard, Gordon J. Walsh, Michael Langan
  • POWER SUPPLY TOPOLOGIES WITH CAPACITANCE MANAGEMENT
    Publication number: 20160094121
    Abstract: In at least one embodiment there is provided a method for managing bulk capacitance of a power supply system. The method includes precharging first and second bulk capacitors of the power supply system to approximately a first output voltage level and a second output voltage level, respectively; receiving a first command signal to generate, by the power supply, the first output voltage level; coupling the first bulk capacitance to load circuitry coupled to the power supply; receiving a second command signal to generate, by the power supply, the second output voltage level; and coupling the second bulk capacitance to the load circuitry coupled to the power supply.
    Type: Application
    Filed: September 25, 2014
    Publication date: March 31, 2016
    Applicant: Intel Corporation
    Inventors: NICHOLAS P. COWLEY, RUCHIR SARASWAT, RICHARD J. GOLDMAN, DAVID T. BERNARD, GORDON J. WALSH, MICHAEL LANGAN