Patents by Inventor David T. Price

David T. Price has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230034277
    Abstract: An electrical connector assembling machine includes a connector strip feed unit including a feeding device configured to index the connector strip through a feed track in successive feed strokes and a contact loading assembly loading contacts into the connector strip. The contact loading assembly includes a wire distribution unit and a wire feed unit having a feeding device configured to simultaneously index wires through feed tracks in successive feed strokes. The wire feed unit includes a wire guide assembly guiding the wires through the wire feed unit. The contact loading assembly includes a contact forming unit and a contact loading device loading the contacts made from the wires into the connector strip as the connector strip is advanced through the electrical connector assembling machine.
    Type: Application
    Filed: July 29, 2021
    Publication date: February 2, 2023
    Inventors: David Wiltraut, Jeffrey Zerbe, Craig Roper, Edward T. Price, III, Albert W. Wolfgang, III
  • Patent number: 11545804
    Abstract: A connector assembling machine a revolver mechanism coupled to a frame. The revolver mechanism includes a shaft coupled to the frame, an actuator operably coupled to the shaft to rotate the shaft, and a rotor rotated by the shaft. The rotor includes a hub coupled to the shaft and mounting brackets extending from the hub. The revolver mechanism includes cartridges coupled to the mounting brackets each having cartridge walls forming a connector cavity configured to receive an electrical connector. The cartridge has a window exposing receptacles of the electrical connector. The rotor is rotated to move the cartridges between a connector loading station, a connector processing station, and a connector unloading station. The cartridges are loaded with the electrical connectors in the connector loading station and unloaded in the connector unloading station. The cartridges position the electrical connectors for loading support plates into the receptacles in the connector processing station.
    Type: Grant
    Filed: March 16, 2021
    Date of Patent: January 3, 2023
    Inventors: Swapnilsinh Solanki, Scott Thomas Schlegel, Jiankun Zhou, Roberto Francisco-Yi Lu, Edward T. Price, III, David Wiltraut
  • Patent number: 11545803
    Abstract: An electrical connector assembling machine includes a connector strip distribution unit including a reel cradle for holding a reel of the connector strip and a roller for rotating the reel of the connector strip to unwind the connector strip from the reel. The electrical connector assembling machine includes a connector strip feed unit including a feeding device configured to index the connector strip through a feed track in successive feed strokes. The electrical connector assembling machine includes a connector strip notching unit including a notching device configured to cut notches in the connector strip at designated locations. The electrical connector assembling machine includes a contact loading unit loading contacts into the connector strip and an electrical connector separating unit for separating the electrical connector from the connector strip.
    Type: Grant
    Filed: July 29, 2021
    Date of Patent: January 3, 2023
    Inventors: David Wiltraut, Craig Roper, Jeffrey Zerbe, Scott A. Day, Edward T. Price, III
  • Patent number: 11506687
    Abstract: In one embodiment, a method of forming a semiconductor device may include forming a sense resistor to receive a high voltage signal and form a sense signal that is representative of the high voltage signal. An embodiment of the sense resistor may optionally be formed overlying a polysilicon resistor. The method may also have an embodiment that may include forming a plurality of capacitors in parallel to portions of the sense resistor wherein the plurality of capacitors are connected together in series.
    Type: Grant
    Filed: September 3, 2020
    Date of Patent: November 22, 2022
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Kevin Alexander Stewart, Martin Kejhar, Radim Mlcousek, Arash Elhami Khorasani, David T. Price, Mark Griswold
  • Publication number: 20220367534
    Abstract: An imaging device may include single-photon avalanche diodes (SPADs). To mitigate crosstalk, isolation structures may be formed around each SPAD. The isolation structures may include front side deep trench isolation structures that extend partially or fully through a semiconductor substrate for the SPADs. The isolation structures may include a metal filler such as tungsten that absorbs photons. The isolation structures may include a p-type doped semiconductor liner to mitigate dark current. The isolation structures may include a buffer layer such as silicon dioxide that is interposed between the metal filler and the p-type doped semiconductor liner. The isolation structures may have a tapered portion or may be formed in two steps such that the isolation structures have different portions with different properties. An additional filler such as polysilicon or borophosphosilicate glass may be included in some of the isolation structures in addition to the metal filler.
    Type: Application
    Filed: May 13, 2021
    Publication date: November 17, 2022
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Jeffrey Peter GAMBINO, David T. PRICE, Marc Allen SULFRIDGE, Richard MAURITZSON, Michael Gerard KEYES, Ryan RETTMANN, Kevin MCSTAY
  • Publication number: 20220302664
    Abstract: A connector assembling machine a revolver mechanism coupled to a frame. The revolver mechanism includes a shaft coupled to the frame, an actuator operably coupled to the shaft to rotate the shaft, and a rotor rotated by the shaft. The rotor includes a hub coupled to the shaft and mounting brackets extending from the hub. The revolver mechanism includes cartridges coupled to the mounting brackets each having cartridge walls forming a connector cavity configured to receive an electrical connector. The cartridge has a window exposing receptacles of the electrical connector. The rotor is rotated to move the cartridges between a connector loading station, a connector processing station, and a connector unloading station. The cartridges are loaded with the electrical connectors in the connector loading station and unloaded in the connector unloading station. The cartridges position the electrical connectors for loading support plates into the receptacles in the connector processing station.
    Type: Application
    Filed: March 16, 2021
    Publication date: September 22, 2022
    Inventors: Swapnilsinh Solanki, Scott Thomas Schlegel, Jiankun Zhou, Roberto Francisco-Yi Lu, Edward T. Price, III, David Wiltraut
  • Publication number: 20220271118
    Abstract: An integrated circuit die includes a silicon chromium (SiCr) thin film resistor disposed on a first oxide layer. The SiCr thin film resistor has a resistor body and a resistor head. A second oxide layer overlays the SiCr thin film resistor. The second oxide layer has an opening exposing a surface of the resistor head. A metal pad is disposed in the opening in the second oxide layer and is contact with the surface of the resistor head exposed by the opening. Further, an interlevel dielectric layer is disposed on the second oxide layer overlaying the SiCr thin film resistor. A metal-filled via extends from a top surface of interlevel dielectric layer through the interlevel dielectric layer and contacts the metal pad disposed in the opening in the second oxide layer.
    Type: Application
    Filed: February 25, 2021
    Publication date: August 25, 2022
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Rick Carlton JEROME, Gordon M. GRIVNA, Kevin Alexander STEWART, David T. PRICE, Jeffrey Peter GAMBINO
  • Publication number: 20220181462
    Abstract: In a general aspect, a transistor can include a fin having a proximal end and a distal end. The fin can include a dielectric portion longitudinally extending between the proximal end and the distal end, and a semiconductor layer disposed on the dielectric portion. The semiconductor layer can longitudinally extend between the proximal end and the distal end. The transistor can further include a source region disposed at the proximal end of the fin, and a drain region disposed at the distal end of the fin. The transistor can also include a gate dielectric layer disposed on a channel region of the semiconductor layer. The channel region can be disposed between the gate dielectric layer and the dielectric portion. The channel region can be longitudinally disposed between the source region and the drain region. The transistor can further include a conductive gate electrode disposed on the gate dielectric layer.
    Type: Application
    Filed: December 3, 2020
    Publication date: June 9, 2022
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Jeffrey Peter GAMBINO, Kevin Alexander STEWART, Peter MOENS, David T. PRICE, Derryl ALLMAN
  • Publication number: 20220093667
    Abstract: Implementations of a semiconductor device may include a photodiode included in a second epitaxial layer of a semiconductor substrate; light shield coupled over the photodiode; and a first epitaxial layer located in one or more openings in the light shield. The first epitaxial layer and the second epitaxial layer may form a single crystal.
    Type: Application
    Filed: September 23, 2020
    Publication date: March 24, 2022
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Manuel H. INNOCENT, Tomas GEURTS, David T. PRICE
  • Publication number: 20220003800
    Abstract: In one embodiment, a method of forming a semiconductor device may include forming a sense resistor to receive a high voltage signal and form a sense signal that is representative of the high voltage signal. An embodiment of the sense resistor may optionally be formed overlying a polysilicon resistor. The method may also have an embodiment that may include forming a plurality of capacitors in parallel to portions of the sense resistor wherein the plurality of capacitors are connected together in series.
    Type: Application
    Filed: September 3, 2020
    Publication date: January 6, 2022
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Kevin Alexander STEWART, Martin KEJHAR, Radim MLCOUSEK, Arash ELHAMI KHORASANI, David T. PRICE, Mark GRISWOLD
  • Patent number: 11075148
    Abstract: A stacked assembly of semiconductor devices includes a mounting pad covering a first portion of a low-side semiconductor device, and a contact layer covering a second portion of the low-side semiconductor device. A first mounting clip electrically connected to the contact layer has a supporting portion joining the first mounting clip to a first lead frame portion. A second mounting clip attached to the mounting pad has a supporting portion joining the second mounting clip to a second lead frame portion. A high-side semiconductor device has a first terminal electrically connected to the first mounting clip and thereby to the contact layer, and a second terminal electrically connected to the second mounting clip.
    Type: Grant
    Filed: November 6, 2019
    Date of Patent: July 27, 2021
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Jeffrey Peter Gambino, David T. Price, Jeffery A. Neuls, Dean E. Probst, Santosh Menon, Peter A. Burke, Bigildis Dosdos
  • Publication number: 20210111106
    Abstract: A stacked assembly of semiconductor devices includes a mounting pad covering a first portion of a low-side semiconductor device, and a contact layer covering a second portion of the low-side semiconductor device. A first mounting clip electrically connected to the contact layer has a supporting portion joining the first mounting clip to a first lead frame portion. A second mounting clip attached to the mounting pad has a supporting portion joining the second mounting clip to a second lead frame portion. A high-side semiconductor device has a first terminal electrically connected to the first mounting clip and thereby to the contact layer, and a second terminal electrically connected to the second mounting clip.
    Type: Application
    Filed: November 6, 2019
    Publication date: April 15, 2021
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Jeffrey Peter GAMBINO, David T. Price, Jeffery A. NEULS, Dean E. PROBST, Santosh MENON, Peter A. BURKE, Bigildis DOSDOS
  • Publication number: 20200328271
    Abstract: Implementations of capacitors may include: a first electrode having a first side and a second side. The capacitor may also include a silicon nitride (SiN) layer including on the second side of the first electrode. An opening may be included in the silicon nitride layer. The capacitors may include a dielectric layer within the opening of the SiN layer. The dielectric layer may include a recess. The capacitor may also include a second electrode having a first side and a second side. The first side of the second electrode may be included within the recess of the dielectric layer.
    Type: Application
    Filed: July 9, 2019
    Publication date: October 15, 2020
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Jeffrey Peter GAMBINO, David T. PRICE, Akihiro HASEGAWA, Derryl ALLMAN, Sallie J. HOSE, Kenneth Andrew BATES, Gregory Frank PIATT
  • Publication number: 20200273896
    Abstract: Implementations of pixels may include a photodiode layer including a photodetector and two or more silicon based circular transistors and an interconnect layer coupled to the photodiode layer. The interconnect layer may include an amorphous oxide semiconductor (AOS) transistor operatively coupled with the two or more silicon based circular transistors.
    Type: Application
    Filed: July 9, 2019
    Publication date: August 27, 2020
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Manuel H. INNOCENT, Kevin Alexander STEWART, David T. PRICE
  • Publication number: 20190393257
    Abstract: Implementations of image sensor devices may include a through-silicon-via (TSV) formed in a backside of an image sensor device and extending through a material of a die to a metal landing pad. The metal landing pad may be within a contact layer. The devices may include a TSV edge seal ring surrounding a portion of the TSV in the contact layer and extending from a first surface of the contact layer into the contact layer to a depth coextensive with a depth of the TSV.
    Type: Application
    Filed: June 21, 2018
    Publication date: December 26, 2019
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Jeffrey Peter Gambino, Rick Jerome, David T. Price
  • Publication number: 20190363124
    Abstract: Implementations of semiconductor packages may include: a digital signal processor having a first side and a second side and an image sensor array, having a first side and a second side. The first side of the image sensor array may be coupled to the second side of the digital signal processor through a plurality of hybrid bond interconnect (HBI) bond pads and an edge seal. One or more openings may extend from the second side of the image sensor array into the second side of the digital signal processor to an etch stop layer in the second side of the digital signal processor. The one or more openings may form a second edge seal between the plurality of HBI bond pads and the edge of the digital signal processor.
    Type: Application
    Filed: August 9, 2019
    Publication date: November 28, 2019
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Jeffrey Peter GAMBINO, Kyle THOMAS, David T. PRICE, Rusty WINZENREAD, Bruce GREENWOOD
  • Patent number: 10431614
    Abstract: Implementations of semiconductor packages may include: a digital signal processor having a first side and a second side and an image sensor array, having a first side and a second side. The first side of the image sensor array may be coupled to the second side of the digital signal processor through a plurality of hybrid bond interconnect (HBI) bond pads and an edge seal. One or more openings may extend from the second side of the image sensor array into the second side of the digital signal processor to an etch stop layer in the second side of the digital signal processor. The one or more openings may form a second edge seal between the plurality of HBI bond pads and the edge of the digital signal processor.
    Type: Grant
    Filed: February 1, 2017
    Date of Patent: October 1, 2019
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Jeffrey Peter Gambino, Kyle Thomas, David T. Price, Rusty Winzenread, Bruce Greenwood
  • Patent number: 10403659
    Abstract: Implementations of image sensors may include a first die including an image sensor array and a first plurality of interconnects where the image sensor array includes a plurality of photodiodes and a plurality of transfer gates. The image sensor array may also include a second die including a second plurality of interconnects and a plurality of capacitors, each capacitor selected from the group consisting of deep trench capacitors, metal-insulator-metal (MIM) capacitors, polysilicon-insulator-polysilicon (PIP) capacitors, and 3D stacked capacitors. The first die may be coupled to the second die through the first plurality of interconnects and through the second plurality of interconnects. No more than eight photodiodes of the plurality of photodiodes of the first die may be electrically coupled with no more than four capacitors of the plurality of capacitors.
    Type: Grant
    Filed: August 29, 2018
    Date of Patent: September 3, 2019
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Jeffrey Peter Gambino, Angel Rodriguez, David T. Price, Jeffery Allen Neuls, Kenneth Andrew Bates, Rick Mauritzson
  • Publication number: 20190043903
    Abstract: Implementations of image sensors may include a first die including an image sensor array and a first plurality of interconnects where the image sensor array includes a plurality of photodiodes and a plurality of transfer gates. The image sensor array may also include a second die including a second plurality of interconnects and a plurality of capacitors, each capacitor selected from the group consisting of deep trench capacitors, metal-insulator-metal (MIM) capacitors, polysilicon-insulator-polysilicon (PIP) capacitors, and 3D stacked capacitors. The first die may be coupled to the second die through the first plurality of interconnects and through the second plurality of interconnects. No more than eight photodiodes of the plurality of photodiodes of the first die may be electrically coupled with no more than four capacitors of the plurality of capacitors.
    Type: Application
    Filed: August 29, 2018
    Publication date: February 7, 2019
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Jeffrey Peter GAMBINO, Angel RODRIGUEZ, David T. PRICE, Jeffery Allen NEULS, Kenneth Andrew BATES, Rick MAURITZSON
  • Patent number: 10090342
    Abstract: Implementations of image sensors may include a first die including an image sensor array and a first plurality of interconnects where the image sensor array includes a plurality of photodiodes and a plurality of transfer gates. The image sensor array may also include a second die including a second plurality of interconnects and a plurality of capacitors, each capacitor selected from the group consisting of deep trench capacitors, metal-insulator-metal (MIM) capacitors, polysilicon-insulator-polysilicon (PIP) capacitors, and 3D stacked capacitors. The first die may be coupled to the second die through the first plurality of interconnects and through the second plurality of interconnects. No more than eight photodiodes of the plurality of photodiodes of the first die may be electrically coupled with no more than four capacitors of the plurality of capacitors.
    Type: Grant
    Filed: August 1, 2017
    Date of Patent: October 2, 2018
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Jeffrey Peter Gambino, Angel Rodriguez, David T. Price, Jeffery Allen Neuls, Kenneth Andrew Bates, Rick Mauritzson