Patents by Inventor David Trann Clark

David Trann Clark has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11626325
    Abstract: The method of manufacturing an integrated circuit includes obtaining a silicon carbide substrate of a first conductivity type having an epitaxial layer of a second conductivity type thereon. A dopant is implanted in the epitaxial layer to form a first region of the first conductivity type that extends the full depth of the epitaxial layer. A first transistor is formed in the first region and a second transistor is formed in the epitaxial layer.
    Type: Grant
    Filed: August 9, 2022
    Date of Patent: April 11, 2023
    Assignee: Raytheon Systems Limited
    Inventors: David Trann Clark, Robin Forster Thompson
  • Publication number: 20220384643
    Abstract: The method of manufacturing an integrated circuit includes obtaining a silicon carbide substrate of a first conductivity type having an epitaxial layer of a second conductivity type thereon. A dopant is implanted in the epitaxial layer to form a first region of the first conductivity type that extends the full depth of the epitaxial layer. A first transistor is formed in the first region and a second transistor is formed in the epitaxial layer.
    Type: Application
    Filed: August 9, 2022
    Publication date: December 1, 2022
    Applicant: Raytheon Systems Limited
    Inventors: David Trann Clark, Robin Forster Thompson
  • Patent number: 11450568
    Abstract: The method of manufacturing an integrated circuit includes obtaining a silicon carbide substrate of a first conductivity type having an epitaxial layer of a second conductivity type thereon. A dopant is implanted in the epitaxial layer to form a first region of the first conductivity type that extends the full depth of the epitaxial layer. A first transistor is formed in the first region and a second transistor is formed in the epitaxial layer.
    Type: Grant
    Filed: April 13, 2018
    Date of Patent: September 20, 2022
    Assignee: Raytheon Systems Limited
    Inventors: David Trann Clark, Robin Forster Thompson
  • Patent number: 10665703
    Abstract: The lateral bipolar junction transistor has a silicon carbide layer, the silicon carbide layer comprises a base region with a first conductivity type, a collector region with a second conductivity type and an emitter region with a second conductivity type. The collector region and the emitter region are within the base region, and the base region, collector region and emitter region are all arranged along an upper surface of the silicon carbide layer.
    Type: Grant
    Filed: April 13, 2018
    Date of Patent: May 26, 2020
    Assignee: Raytheon Systems Limited
    Inventors: David Trann Clark, Ewan Philip Ramsay
  • Publication number: 20180301379
    Abstract: The method of manufacturing an integrated circuit includes obtaining a silicon carbide substrate of a first conductivity type having an epitaxial layer of a second conductivity type thereon. A dopant is implanted in the epitaxial layer to form a first region of the first conductivity type that extends the full depth of the epitaxial layer. A first transistor is formed in the first region and a second transistor is formed in the epitaxial layer.
    Type: Application
    Filed: April 13, 2018
    Publication date: October 18, 2018
    Applicant: Raytheon Systems Limited
    Inventors: David Trann Clark, Robin Forster Thompson
  • Publication number: 20180301548
    Abstract: The lateral bipolar junction transistor has a silicon carbide layer, the silicon carbide layer comprises a base region with a first conductivity type, a collector region with a second conductivity type and an emitter region with a second conductivity type. The collector region and the emitter region are within the base region, and the base region, collector region and emitter region are all arranged along an upper surface of the silicon carbide layer.
    Type: Application
    Filed: April 13, 2018
    Publication date: October 18, 2018
    Applicant: Raytheon Systems Limited
    Inventors: David Trann Clark, Ewan Philip Ramsay