Abstract: Disclosed herein are lattice reduction systems and methods for a MIMO communication system. One such method includes providing a channel matrix corresponding to a channel in a MIMO communication system, preprocessing the channel matrix to form at least an upper triangular matrix, implementing a relaxed size reduction process, and implementing a basis update process. Implementing the relaxed size reduction process comprises choosing a first relaxed size reduction parameter for a first-off-diagonal element of the upper triangular matrix, choosing a second relaxed size reduction parameter, which is greater than the first relaxed size reduction parameter, for a second-off-diagonal element of the upper triangular matrix evaluating whether a first relaxed size reduction condition is satisfied for the first-off-diagonal element of the upper triangular matrix, and evaluating whether a second relaxed size reduction condition is satisfied for the second-off-diagonal element of the upper triangular matrix.

Abstract: Systems and methods for suppressing noise in a signal are disclosed herein. In exemplary embodiments of the present invention, noise is suppressed using perceptual adaptive gain control based on signal-to-noise ratios. In other embodiment of the present invention, the gain of a signal is mapped as a function of an active estimate of the envelope of the signal.

Abstract: One preferred embodiment of the present invention provides systems and methods for removing noise from an input analog signal in continues time. Briefly described in architecture, one embodiment of the system, among others, can be implemented as follows. An analog filtering system including VLSI circuitry separates an analog input signal into a plurality of sub-band signals. Then, an analog gain system including VLSI circuitry calculates a gain for each sub-band signal that suppresses the noise within the sub-band signal. In some preferred embodiments, VLSI circuitry includes floating gate technology. Methods and other systems are also provided.

Abstract: A bale handling vehicle includes a wheeled chassis having a cab, a frame, a plurality of wheels, and a bale handling system attached to the frame. The bale handling system includes a base frame, a bale gripper structure at the front of the vehicle for picking up bales, a first platform above the vehicle cab for receiving bales from the bale gripper structure, and a second platform positioned behind the first platform. The second platform includes a movable portion that can be raised to a vertical position for stacking the bales. The first platform is movable between a lowered position for receiving the bales from the bale gripper structure, and a raised position for causing the bales to slide rearwardly onto the second platform. Intermediate stop members are movable to selectively block the bales from sliding onto the movable portion of the second platform.

Abstract: Systems and methods are discussed for using a floating-gate MOSFET as a programmable reference circuit. One example of the programmable reference circuit is a programmable voltage reference source, while a second example of a programmable reference circuit is a programmable reference current source. The programmable voltage reference source and/or the reference current source may be incorporated into several types of circuits, such as comparator circuits, current-mirror circuits, and converter circuits. Comparator circuits and current-mirror circuits are often incorporated into circuits such as converter circuits. Converter circuits include analog-to-digital converters and digital-to-analog converters.

Abstract: In one exemplary embodiment, a programmable analog array (PAA) contains a configurable analog matrix having two floating-gate field effect transistors (FETs). Also contained in the PAA is an interconnect circuit that is programmable to configure the configurable analog matrix to operate in one or more of several matrix modes. A few examples of such matrix modes include a switching matrix mode, a memory matrix mode, and a computing matrix mode. In an exemplary method of configuring the PAA. PAA, the the method includes programming an interconnection, for example, between a first terminal of the first floating-gate FET and a first terminal of the second floating-gate FET. The method further includes programming an interconnection, for example, between a gate terminal of the first floating-gate FET and a fixed voltage source, for setting a floating gate charge on the first floating-gate FET.

Abstract: Systems and methods are discussed for using a floating-gate MOSFET as a programmable reference circuit. One example of the programmable reference circuit is a programmable voltage reference source, while a second example of a programmable reference circuit is a programmable reference current source. The programmable voltage reference source and/or the reference current source may be incorporated into several types of circuits, such as comparator circuits, current-mirror circuits, and converter circuits. Comparator circuits and current-mirror circuits are often incorporated into circuits such as converter circuits. Converter circuits include analog-to-digital converters and digital-to-analog converters.

Abstract: One preferred embodiment of the present invention provides systems and methods for removing noise from an input analog signal in continues time. Briefly described in architecture, one embodiment of the system, among others, can be implemented as follows. An analog filtering system including VLSI circuitry separates an analog input signal into a plurality of sub-band signals. Then, an analog gain system including VLSI circuitry calculates a gain for each sub-band signal that suppresses the noise within the sub-band signal. In some preferred embodiments, VLSI circuitry includes floating gate technology. Methods and other systems are also provided.

Abstract: Systems and methods for configuring a floating-gate transistor device to perform a computational function upon an input signal that is coupled into a floating-gate of the floating gate field-effect transistor, wherein the computational function is dependent upon a charge that is programmed into the floating-gate of the floating-gate field effect transistor. Also provided is a configuration circuit that is used to configure circuit parameters of the floating gate field-effect transistor in order to perform the computational function. In one embodiment, the floating gate transistor, which is a floating-gate pFET, is part of an analog memory array.

Abstract: A system and method for removing noise from a signal containing speech (or a related, information carrying signal) and noise. A speech or voice activity detector (VAD) is provided for detecting whether speech signals are present in individual time frames of an input signal. The VAD comprises a speech detector that receives as input the input signal and examines the input signal in order to generate a plurality of statistics that represent characteristics indicative of the presence or absence of speech in a time frame of the input signal, and generates an output based on the plurality of statistics representing a likelihood of speech presence in a current time frame; and a state machine coupled to the speech detector and having a plurality of states. The state machine receives as input the output of the speech detector and transitions between the plurality of states based on a state at a previous time frame and the output of the speech detector for the current time frame.

Abstract: An adaptive filter is provided featuring a speech spectrum estimator receiving as input an estimated spectral magnitude signal for a time frame of the input signal and generating an estimated speech spectral magnitude signal representing estimated spectral magnitude values for speech in a time frame. A spectral gain generator receives as input the estimated spectral magnitude signal and the estimated speech spectral magnitude signal and generates as output an initial spectral gain signal that yields an estimate of speech spectrum in a time frame of the input signal when the initial spectral gain signal is applied to the spectral signal. A spectral gain modifier receives as input the initial spectral gain signal and generates a modified gain signal by limiting a rate of change of the initial spectral gain signal with respect to the spectral gain over a number of previous time frames. The modified gain signal is then applied to the spectral signal, which is then converted to its time domain equivalent.