Patents by Inventor David W. Knebelsberger

David W. Knebelsberger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Very small swing high performance asynchronous CMOS static memory (multi-port register file) with power reducing column multiplexing scheme
    Patent number: 7986570
    Abstract: The present invention relates to a multi-port register file memory or SRAM including a plurality of storage elements and other circuitry that operate synchronously or asynchronously. The storage elements are arranged in rows and columns and store data. Two read port pairs are coupled to each of the storage elements and a differential sensing device or circuit. The read port is coupled to the storage elements in an isolated manner, enabling a plurality of cells to be arranged in such rows and columns. The sensing device is adapted to sense a small voltage swing. A column mux circuit is coupled to each column and the sensing device. Performance is not degraded unusually as the power supply voltage is reduced due to bus drop or inductive effects.
    Type: Grant
    Filed: November 12, 2009
    Date of Patent: July 26, 2011
    Assignee: Broadcom Corporation
    Inventors: Mark Slamowitz, Douglas D. Smith, David W. Knebelsberger, Myron Buer
  • Very Small Swing High Performance Asynchronous CMOS Static Memory (Multi-Port Register File) With Power Reducing Column Multiplexing Scheme
    Publication number: 20100177581
    Abstract: The present invention relates to a multi-port register file memory or SRAM including a plurality of storage elements and other circuitry that operate synchronously or asynchronously. The storage elements are arranged in rows and columns and store data. Two read port pairs are coupled to each of the storage elements and a differential sensing device or circuit. The read port is coupled to the storage elements in an isolated manner, enabling a plurality of cells to be arranged in such rows and columns. The sensing device is adapted to sense a small voltage swing. A column mux circuit is coupled to each column and the sensing device. Performance is not degraded unusually as the power supply voltage is reduced due to bus drop or inductive effects.
    Type: Application
    Filed: November 12, 2009
    Publication date: July 15, 2010
    Inventors: Mark Slamowitz, Douglas D. Smith, David W. Knebelsberger, Myron Buer
  • Very small swing high performance asynchronous CMOS static memory (multi-port register file) with power reducing column multiplexing scheme
    Patent number: 7639549
    Abstract: The present invention relates to a multi-port register file memory or SRAM including a plurality of storage elements and other circuitry that operate synchronously or asynchronously. The storage elements are arranged in rows and columns and store data. Two read port pairs are coupled to each of the storage elements and a differential sensing device or circuit. The read port is coupled to the storage elements in an isolated manner, enabling a plurality of cells to be arranged in such rows and columns. The sensing device is adapted to sense a small voltage swing. A column mux circuit is coupled to each column and the sensing device. Performance is not degraded unusually as the power supply voltage is reduced due to bus drop or inductive effects.
    Type: Grant
    Filed: July 12, 2007
    Date of Patent: December 29, 2009
    Assignee: Broadcom Corporation
    Inventors: Mark Slamowitz, Douglas D. Smith, David W. Knebelsberger, Myron Buer
  • Very small swing high performance asynchronous CMOS static memory (multi-port register file) with power reducing column multiplexing scheme
    Patent number: 7251175
    Abstract: The present invention relates to a multi-port register file memory or SRAM including a plurality of storage elements and other circuitry that operate synchronously or asynchronously, and a method of making the multi-port register file memory. The storage elements are arranged in N rows and M columns and store data, each column having at least one output channel or circuit. Two read port pairs are coupled to each of the storage elements and a plurality of differential sensing devices or circuits. The read port is coupled to the storage elements in an isolated manner, enabling a plurality of cells to be arranged in such rows and columns. The sensing device is adapted to sense a small voltage swing. A column mux circuit is coupled to each column and at least one of the sensing device. The method of forming the multi-port register file memory comprises determining the number of storage elements and arranging the storage elements in the N rows and M columns, each column having an output channel.
    Type: Grant
    Filed: November 23, 2004
    Date of Patent: July 31, 2007
    Assignee: Broadcom Corporation
    Inventors: Mark Slamowitz, Douglas D. Smith, David W. Knebelsberger, Myron Buer
  • Very small swing high performance CMOS static memory (multi-port register file) with power reducing column multiplexing scheme
    Patent number: 6903996
    Abstract: The present invention relates to storage element. At least one read port is coupled to the storage element and a sensing device is coupled to the read port, where the read port is coupled to the storage element in an isolated manner. The sensing device is adapted to sense a small voltage swing. The sensing device includes two inverters comprising input offset and gain stages.
    Type: Grant
    Filed: January 10, 2003
    Date of Patent: June 7, 2005
    Assignee: Broadcom Corporation
    Inventors: Mark Slamowitz, Douglas D. Smith, David W. Knebelsberger, Gregory Djaja
  • Very small swing high performance asynchronous CMOS static memory (multi-port register file) with power reducing column multiplexing scheme
    Patent number: 6822918
    Abstract: The present invention relates to a method for improving speed and increasing performance in a multi-port register file memory or SRAM including at least one storage element and other circuitry that operate synchronously or asynchronously. The method comprises differentially sensing a small voltage swing in the multi-port memory using a two-stage analog-style sense amplifier including at least one trip-level-shifted inverter device.
    Type: Grant
    Filed: October 6, 2003
    Date of Patent: November 23, 2004
    Assignee: Broadcom Corporation
    Inventors: Mark Slamowitz, Douglas D. Smith, David W. Knebelsberger, Myron Buer
  • Very small swing high performance asynchronous CMOS static memory (multi-port register file) with power reducing column multiplexing scheme
    Publication number: 20040066687
    Abstract: The present invention relates to a multi-port register file memory or SRAM including a plurality of storage elements and other circuitry that operate synchronously or asynchronously. The storage elements are arranged in rows and columns and store data. Two read port pairs are coupled to each of the storage elements and a differential sensing device or circuit. The read port is coupled to the storage elements in an isolated manner, enabling a plurality of cells to be arranged in such rows and columns. The sensing device is adapted to sense a small voltage swing. A column mux circuit is coupled to each column and the sensing device. Performance is not degraded unusually as the power supply voltage is reduced due to bus drop or inductive effects.
    Type: Application
    Filed: October 6, 2003
    Publication date: April 8, 2004
    Inventors: Mark Slamowitz, Douglas D. Smith, David W. Knebelsberger, Myron Buer
  • Very small swing high performance asynchronous CMOS static memory (multi-port register file) with power reducing column multiplexing scheme
    Patent number: 6639866
    Abstract: The present invention relates to a multi-port register file memory or SRAM including a plurality of storage elements and other circuitry that operate synchronously or asynchronously. The storage elements are arranged in rows and columns and store data. Two read port pairs are coupled to each of the storage elements and a differential sensing device or circuit. The read port is coupled to the storage elements in an isolated manner, enabling a plurality of cells to be arranged in such rows and columns. The sensing device is adapted to sense a small voltage swing. A column mux circuit is coupled to each column and the sensing device. Performance is not degraded unusually as the power supply voltage is reduced due to bus drop or inductive effects.
    Type: Grant
    Filed: November 3, 2001
    Date of Patent: October 28, 2003
    Assignee: Broadcom Corporation
    Inventors: Mark Slamowitz, Douglas D. Smith, David W. Knebelsberger, Myron Buer
  • Very small swing high performance CMOS static memory (multi-port register file) with power reducing column multiplexing scheme
    Publication number: 20030099148
    Abstract: The present invention relates to a multi-port register file memory including a plurality of storage elements in columns. The storage elements are arranged in rows and columns and store data. At least one read port is coupled to each of the storage elements and a sensing device is coupled to the read port. The read port is coupled to the storage elements in an isolated manner, enabling a plurality of cells to be arranged in such rows and columns. The sensing device is adapted to sense a small voltage swing. A pair of series transistors coupled together act as the read port while a column mux circuit is coupled to each column and the sensing device. The sensing device includes two inverters comprising input offset and gain stages. An offset device biases the local bitlines at a voltage close to the sense amplifier trip point.
    Type: Application
    Filed: January 10, 2003
    Publication date: May 29, 2003
    Inventors: Mark Slamowitz, Douglas D. Smith, David W. Knebelsberger, Gregory Djaja
  • Very small swing high performance CMOS static memory (multi-port register file) with power reducing column multiplexing scheme
    Patent number: 6519204
    Abstract: Devices and methods relating to a multi-port register file memory including a plurality of storage elements in columns are disclosed. The storage elements are arranged in rows and columns and store data. At least one read port is coupled to each of the storage elements and a sensing device is coupled to the read port. The read port is coupled to the storage elements in an isolated manner, enabling a plurality of cells to be arranged in such rows and columns. The sensing device is adapted to sense a small voltage swing. A pair of series transistors coupled together act as the read port while a column mux circuit is coupled to each column and the sensing device. The sensing device includes two inverters comprising input offset and gain stages. An offset device biases the local bitlines at a voltage close to the sense amplifier trip point.
    Type: Grant
    Filed: September 27, 2001
    Date of Patent: February 11, 2003
    Assignee: Broadcom Corporation
    Inventors: Mark Slamowitz, Douglas D. Smith, David W. Knebelsberger, Gregory Djaja
  • Very small swing high performance asynchronous CMOS static memory (multi-port register file) with power reducing column multiplexing scheme
    Publication number: 20020125585
    Abstract: The present invention relates to a multi-port register file memory or SRAM including a plurality of storage elements and other circuitry that operate synchronously or asynchronously. The storage elements are arranged in rows and columns and store data. Two read port pairs are coupled to each of the storage elements and a differential sensing device or circuit. The read port is coupled to the storage elements in an isolated manner, enabling a plurality of cells to be arranged in such rows and columns. The sensing device is adapted to sense a small voltage swing. A column mux circuit is coupled to each column and the sensing device. Performance is not degraded unusually as the power supply voltage is reduced due to bus drop or inductive effects.
    Type: Application
    Filed: November 3, 2001
    Publication date: September 12, 2002
    Inventors: Mark Slamowitz, Douglas D. Smith, David W. Knebelsberger, Myron Buer
  • Very small swing high performance CMOS static memory (multi-port register file) with power reducing column multiplexing scheme
    Publication number: 20020071333
    Abstract: The present invention relates to a multi-port register file memory including a plurality of storage elements in columns. The storage elements are arranged in rows and columns and store data. At least one read port is coupled to each of the storage elements and a sensing device is coupled to the read port. The read port is coupled to the storage elements in an isolated manner, enabling a plurality of cells to be arranged in such rows and columns. The sensing device is adapted to sense a small voltage swing. A pair of series transistors coupled together act as the read port while a column mux circuit is coupled to each column and the sensing device. The sensing device includes two inverters comprising input offset and gain stages. An offset device biases the local bitlines at a voltage close to the sense amplifier trip point.
    Type: Application
    Filed: September 27, 2001
    Publication date: June 13, 2002
    Inventors: Mark Slamowitz, Douglas D. Smith, David W. Knebelsberger, Gregory Djaja