Abstract: The analog to digital converter 300 has voltage reference circuitry 326 which includes a bandgap generator and a correction circuit 5300. The bandgap generator includes first and second NPN transistors 5211-5224, 5231-5232 of differing emitter areas and an operational amplifier 5202 with inputs sensing the collector current of the first and second NPN transistors 5211-5224, 5231-5232. First and second NPN transistors 5211-5224, 5231-5232 have their bases tied together. The output of the amplifier 5202 drives the bases of the NPN transistors 5211-5224, 5231-5232 through a resistor divider 5251-5253.

Abstract: A two-step analog-to-digital converter and BiCMOS fabrication method. The fabrication method provides pseudosubstrate isolation of digital CMOS devices from the analog devices. The converter uses NPN current switching in a flash analog-to-digital converter and in a digital-to-analog converter for low noise operation. CMOS digital error correction and BiCMOS output drivers provide high packing density plus large output load handling. Timing control aggregates switching events and puts them into intervals when noise sensitive operations are inactive. The fabrication method uses a thin epitaxial layer with limited thermal processing to provide NPN and PNP devices with large breakdown and Early voltages. Laser trimmed resistors provide small long term drift due to dopant stabilization in underlying BPSG and low hydrogen nitride passivation.